Production Data

WM2331

WOLFSON MICROELECTRONICS LTD

PD Rev 1.4 April 2001

5

Test Conditions:

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Analogue Reference Inputs / Outputs in Top/Bottom Mode (MODE=AVDD)

Bottom reference voltage

applied to REFBS

0

AVDD - 1

V

Top reference voltage applied to

REFTS

1

AVDD

V

Differential reference input

(REFTS – REFBS)

12

V

Reference input common mode

(REFTS + REFBS) / 2

0.5

AVDD - 0.5

V

Switched input capacitance on

REFBS

0.6

pF

Switched input capacitance on

REFTS

0.6

pF

REFBF output voltage

(AVDD -

V

REFTF output voltage

(AVDD +

V

Analogue Reference Inputs / Outputs in Centre-Span Mode (MODE=AVDD/2)

Reference voltage derived or

applied to VREF

12

V

REFBF output voltage

(AVDD -

VREF)/2

V

REFTF output voltage

(AVDD +

VREF)/2

V

Non-AIN side of differential input

applied to REFTS and REFBS

(Note 2)

0.5

AVDD - 0.5

V

Analogue Reference Inputs / Outputs in Full External Reference Mode (MODE=AGND) (Note 3)

Differential reference voltage

applied (REFTF – REFBF)

12

V

AVDD = 3.0V

1.3

1.5

1.7

V

Reference input common mode

(REFTF + REFBF) / 2

AVDD = 5.0V

2.0

2.5

3.0

V

Reference input resistance

680

Ω

VREF Input / Output specifications

Internal 1V reference to VREF

REFSENSE = VREF

0.95

1.0

1.05

V

Internal 2V reference to VREF

REFSENSE = AGND

1.9

2.0

2.1

V

External reference applied to

VREF pin in centre-span mode

REFSENSE = AVDD,

MODE = AVDD / 2

12

V

Input impedance in centre-span

mode

REFSENSE = AVDD,

MODE = AVDD / 2

18

k

Ω