Production Data

WM2331

WOLFSON MICROELECTRONICS LTD

PD Rev 1.4 April 2001

17

Figure 19 shows an example register write cycle where the clamp DAC code is set to 199 (hex) by

writing to clamp registers 1 and 2 (see ‘Digital Control Registers’, below). Pins DIO0 to DIO7 are

driven to the clamp DAC code lower byte (0F hex) and pins DIO8 and DIO9 are both driven to 0 to

select clamp register 1 as the data destination. The clamp low-byte data is then loaded into this

register by pulsing WR high. The top 2 bits of the DAC word are then loaded by driving 01(hex) on

pins DIO0 to DIO7 and by driving pin DIO8 to 1 and pin DIO9 to 0 to select clamp register 2 as the

data destination. WR is pulsed a second time to latch this second control word into clamp register 2.

NOE

WR

DIO[9:0]

OUTPUT

OUTPUT

INPUT 099

INPUT 101

Load 99 hex into

register 0

Load 01 hex into

register 1

Figure 19 Example Register Write Cycle to Clamp DAC Register

DIGITAL CONTROL REGISTERS

The WM2331 contains two clamp registers and a control register for user programming. Binary data

can be written into these registers using pins DIO0 to DIO9 and the WR and OEB pins (see the

previous section). In input mode, DIO9 and DIO8 are address bits and the remaining DIO pins are

data bits.

DATA BITS DIO[7:0]

ADDRESS

DIO[9:8]

DESCRIPTION

DEFAULT

(HEX)

READ/

WRITE

DIO7

DIO6

DIO5

DIO4

DIO3

DIO2

DIO1

DIO0

00

Clamp Reg. 1

00

RW

DAC[7]

DAC[6] DAC[5]

DAC[4]

DAC[3]

DAC[2] DAC[1] DAC[0]

01

Clamp Reg. 2

00

RW

DAC[9] DAC[8]

10

Control Reg.

01

RW

CLDIS TWOC

CLINT

PDWN

PGA[2] PGA[1] PGA[0]

11

Reserved

Table 3 Register Map