WM2613

Byte-wide Parallel Input, 12-bit Voltage Output DAC

Production Data, June 1999, Rev 1.0

WOLFSON MICROELECTRONICS LTD

Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK

Tel: +44 (0) 131 667 9386

Fax: +44 (0) 131 667 5176

Email: sales@wolfson.co.uk

http://www.wolfson.co.uk

Production Data Datasheets contain final

specifications current on publication date.

Supply of products conforms to Wolfson

Microelectronics’ Terms and conditions.

Master rev 1.0.doc June 17, 1999 14:12

©1999 Wolfson Microelectronics Ltd

.

FEATURES

•

Dual 12-bit voltage output DAC

•

Dual supply 2.7V to 5.5V operation

•

DNL

±±0.4 LSB, INL ±±1.5 LSB

•

Programmable settling time 1

µµs or 3µµs typical

•

8-bit micro controller compatible interface

•

Power down mode (10nA)

APPLICATIONS

•

Battery powered test instruments

•

Digital offset and gain adjustment

•

Battery operated/remote industrial controls

•

Machine and motion control devices

•

Wireless telephone and communication systems

•

Speech synthesis

•

Arbitrary waveform generation

ORDERING INFORMATION

DEVICE

TEMP. RANGE

PACKAGE

WM2613CDT

0

° to 70°C

20-pin TSSOP

WM2613IDT

-40

° to 85°C

20-pin TSSOP

DESCRIPTION

The WM2613 is a 12-bit voltage output, resistor string, digital-to-

analogue converter. The DAC can be powered down under

software or hardware control, reducing power consumption to

10nA.

The device has an 8-bit microcontroller compatible parallel

interface. The eight data LSBs, the four data MSBs, and the three

control bits are written using three different addresses.

Excellent performance is delivered with a typical DNL of 0.4 LSBs.

The output stage is buffered by a x2 gain near rail-to-rail amplifier,

which features a Class A output stage (slow mode, class AB). The

settling time of the DAC is software programmable to allow the

designer to optimize speed versus power dissipation.

The device is available in a 20-pin TSSOP package. Commercial

temperature (0° to 70°C) and Industrial temperature (-40° to 85°C)

variants are supported.

BLOCK DIAGRAM

TYPICAL PERFORMANCE

(13) OUT

3-BIT

CONTROL

LATCH

REFIN(12)

POWER-ON

RESET

NWE (17)

(14)

GND

DVDD

(10)

REFERENCE

INPUT BUFFER

WM2613

DAC

OUTPUT

BUFFER

NCS (18)

A[0-1] (8,7)

D[0-7]

(19,20, 1-6)

4-BIT DAC

MSW

HOLDING

LATCH

8-BIT DAC

LSW

HOLDING

LATCH

X1

POWERDOWN/

SPEED

CONTROL

X2

(16)

NLDAC

AVDD

(11)

PARALLEL

INTERFACE

AND

CONTROL

LOGIC

SPD (9)

NPD (15)

12-BIT DAC

LATCH

AVDD = DVDD = 5V, V

-1

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

0

512

1024

1536

2048

2559

3071

3583

4095

DIGITAL CODE