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CS43L22 数据表(PDF) 49 Page - Cirrus Logic

部件名 CS43L22
功能描述  Low Power, Stereo DAC w/Headphone & Speaker Amps
PDF  66 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS43L22 数据表(HTML) 49 Page - Cirrus Logic

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DS792F2
49
CS43L22
Confidential Draft
3/4/10
Notes:
1.
This setting must not change when BEEP is enabled.
2.
Beep off time will scale inversely with sample rate, Fs, but is fixed at the nominal Fs within each speed
mode.
7.16.2
Beep Volume
Sets the volume of the beep signal.
Note:
This setting must not change when BEEP is enabled.
7.17
Beep & Tone Configuration (Address 1Eh)
7.17.1
Beep Configuration
Configures a beep mixed with the HP/Line and SPK output.
Notes:
1.
When used in analog pass through mode, the output alternates between the signal from the
Passthrough Amplifier and the beep signal. The beep signal does not mix with the analog signal from
the Passthrough Amplifier.
2.
Re-engaging the beep before it has completed its initial cycle will cause the beep signal to remain ON
for the maximum ONTIME duration.
7.17.2
Beep Mix Disable
Configures how the beep mixes with the serial data input.
Note:
This setting must not change when BEEP is enabled.
BEEPVOL[4:0]
Gain
00110
+6.0 dB
···
···
00000
-6 dB
11111
-8 dB
11110
-10 dB
···
···
00111
-56 dB
Step Size:
2 dB
Application:
“Beep Generator” on page 22
7
654
3
2
1
0
BEEP1
BEEP0
BEEPMIXDIS
TREBCF1
TREBCF0
BASSCF1
BASSCF0
TCEN
BEEP[1:0]
Beep Occurrence
00
Off
01
Single
10
Multiple
11
Continuous
Application:
“Beep Generator” on page 22
BEEPMIXDIS
Beep Output to HP/Line and Speaker
0
Mix Enabled; The beep signal mixes with the digital signal from the serial data input.
1
Mix Disabled; The output alternates between the signal from the serial data input and the beep signal. The
beep signal does not mix with the digital signal from the serial data input.
Application:
“Beep Generator” on page 22



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