64K/32K/16K

8K/4K/2K x 8 Bit

©Xicor, 1995, 1996 Patents Pending

6686-3.8 8/29/96 T3/C0/D0 SH

1

Characteristics subject to change without notice

X24F064/032/016

FUNCTIONAL DIAGRAM

FEATURES

Program Power Supply Versions

—Active Read Current Less Than 1mA

—Active Program Current Less Than 3mA

—Standby Current Less Than 1

µA

—Software Write Protection

—Programmable hardware Write Protect

Memory array)

—Typical Programming Time of 5ms

Per Sector

—Endurance: 100,000 cycles per byte

—Data Retention: 100 Years

—8-Lead PDIP

—8-Lead SOIC (JEDEC)

—14-Lead TSSOP (X24F032/016)

—20-Lead TSSOP (X24F064)

DESCRIPTION

The

X24F064/032/016

is

a

CMOS

SerialFlash

Memory Family, internally organized 8K/4K/2K x 8.

The family features a serial interface and software

protocol allowing operation on a simple two wire bus.

devices to share a common two wire bus.

A Program Protect Register accessed at the highest

address location, provides three new programming

protection features: Software Programming Protection,

Block Lock Protection, and Hardware Programming

Protection. The Software Programming Protection

feature prevents any nonvolatile writes to the device

until the WEL bit in the program protect register is set.

individually protect four blocks of the array by program-

ming two bits in the programming protect register. The

Programmable Hardware Program Protect feature

allows the user to install each device with PP tied to

then enable the hardware programming protection by

programming a PPEN bit in the program protect

register. After this, selected blocks of the array,

including the program protect register itself, are

permanently protected from being programmed.

6686 ILL F01.5

COMMAND

DECODE

AND CONTROL

LOGIC

X

DECODE

LOGIC

SECTORED

MEMORY

ARRAY

SDA

SCL

PROGRAM

PROTECT

REGISTER

PROGRAMMING

CONTROL LOGIC

PP

HIGH VOLTAGE

CONTROL

SECTOR DECODE LOGIC

32

8

DATA REGISTER

Protection are trademarks of Xicor, Inc.

A V A I L A B L E

AN76 • AN78 • AN81 • AN87