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X24F032PI 数据表(PDF) 13 Page - Xicor Inc. |
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X24F032PI 数据表(HTML) 13 Page - Xicor Inc. |
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13 / 18 page ![]() X24F064/032/016 13 SYMBOL TABLE WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from LOW to HIGH Will change from LOW to HIGH May change from HIGH to LOW Will change from HIGH to LOW Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High Impedance The program cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the program cycle, the X24F064/032/016 bus interface circuits are disabled, SDA is allowed to remain HIGH, and the device does not respond to its slave address. Bus Timing 6686 ILL F17 tSU:STA tHD:STA tHD:DAT tSU:DAT tLOW tSU:STO tR tBUF SCL SDA IN SDA OUT tDH tAA tF tHIGH Program Cycle Limits 6686 FRM T11.1 Symbol Parameter Min. Typ.(5) Max. Units tPR (6) Program Cycle Time 5 10 ms Bus Timing 6686 ILL F18 SCL SDA 8th BIT WORD n ACK tWR STOP CONDITION START CONDITION Notes: (5) Typical values are for TA = 25°C and nominal supply voltage (2.7V). (6) tWR is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device requires to automatically complete the internal program operation. Guidelines for Calculating Typical Values of Bus Pull-Up Resistors 6686 ILL F19.1 120 100 80 40 60 20 20 40 60 80 100 120 0 0 BUS CAPACITANCE (pF) MIN. RESISTANCE MAX. RESISTANCE RMAX = CBUS t R RMIN = IOL MIN VCC MAX =1.2K Ω |
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