X24F064/032/016

10

Block Lock Bits

The Block Lock Bits BL0 and BL1 determine which

blocks of the memory are write-protected:

Table 1. Block Lock Bits

6686 FRM T02

BL1

BL0

Array Locked

0

0

None

0

1

Upper 1/4

1

0

Upper 1/2

1

1

Full Array (WPR not included)

Programmable Hardware Program Protect

The Program Protect (PP) pin and the Program Protect

Enable (PPEN) bit in the Program Protect Register

control the programmable hardware program protect

feature. Hardware program protection is enabled when

the PP pin and the PPEN bit are both

disabled when either the PP pin is LOW or the PPEN

bit is LOW. When the chip is hardware program-

protected,

nonvolatile

programming

is

disabled,

including the Program Protect Register, the BL bits and

the PPEN bit itself, as well as to Block Locked sections

in the memory array. Only the sections of the memory

array that are not Block Locked can be written. Note

that since the PPEN bit is program-protected, it cannot

be changed back to a LOW state, and program protec-

tion is disabled as long as the PP pin is held HIGH.

Table 2 defines the program protection status for each

state of PPEN and PP.

Table 2. Program Protect Status Table

6686 FRM T03

PP

PPEN

Memory Array

(Not Block Locked)

Memory Array

(Block Locked)

BL Bits

PPEN Bit

0

X

Programmable

Locked

Programmable

Programmable

X

0

Programmable

Locked

Programmable

Programmable

1

1

Programmable

Locked

Locked

Locked