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TMP320C6720RFP300 数据表(PDF) 45 Page - Texas Instruments

部件名 TMP320C6720RFP300
功能描述  Floating-Point Digital Signal Processors
PDF  118 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TMP320C6720RFP300 数据表(HTML) 45 Page - Texas Instruments

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4.11 External Memory Interface (EMIF)
4.11.1 EMIF Device-Specific Information
TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720
Floating-Point Digital Signal Processors
www.ti.com
SPRS370E – SEPTEMBER 2006 – REVISED JULY 2008
The C672x DSP includes an external memory interface (EMIF) for optional SDRAM, NOR FLASH, NAND
FLASH, or SRAM. The key features of this EMIF are:
• One chip select (EM_CS[0]) dedicated for x16 and x32 SDRAM (x8 not supported)
• One chip select (EM_CS[2]) dedicated for x8, x16, or x32 NOR FLASH; x8, x16, or x32 Asynchronous
SRAM; or x8 or x16 NAND FLASH
• Data bus width is 16 bits on the C6726B, C6722B, and C6720; and 32 bits on the C6727B.
• SDRAM burst length of 16 bytes
• External Wait Input on the C6727B through EM_WAIT (programmable active-high or active-low)
• External Wait pin functions as an interrupt for NAND Flash support
• NAND Flash logic calculates ECC on blocks of up to 512 bytes
• ECC logic suitable for single-bit errors
Figure 4-5 and Figure 4-6 show typical examples of EMIF-to-memory hookup on the C672x DSP.
As the figures illustrate, the C672x DSP includes a limited number of EMIF address lines. These are
sufficient to connect to SDRAM seamlessly. Asynchronous memory such as FLASH typically will need to
use additional GPIO pins to act as upper address lines during device boot up when the FLASH contents
are copied into SDRAM. (Normally, code is executed from SDRAM since SDRAM has faster access
times).
Any pins listed with a ‘Y' in the GPIO column of Table 2-12 may be used for this purpose, as long as it can
be assured that they be pulled low at (and after) reset and held low until configured as outputs by the
DSP.
Note that EM_BA[1:0] are used as low-order address lines for the asynchronous interface. For example, in
Figure 4-5 and Figure 4-6, the flash memory is not byte-addressable and its A[0] input selects a 16-bit
value. The corresponding DSP address comes from EM_BA[1]. The remaining address lines from the
DSP (EM_A[12:0]) drive a word address into the flash inputs A[13:1].
For a more detailed explanation of the C672x EMIF operation please refer to the document
TMS320C672x External Memory Interface (EMIF) User's Guide (literature number SPRU711).
Submit Documentation Feedback
Peripheral and Electrical Specifications
45



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