TMP320C6720RFP300 datasheet(6/118 Pages) TI

6 / 118 page

Contents

TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720

Floating-Point Digital Signal Processors

SPRS370E – SEPTEMBER 2006 – REVISED JULY 2008

www.ti.com

TMS320C6727B, TMS320C6726B,

4.4

Electrical Characteristics

............................ 34

TMS320C6722B, TMS320C6720 DSPs

............... 1

4.5

Parameter Information

.............................. 35

1.1

Features

.............................................. 1

4.6

Timing Parameter Symbology

....................... 36

1.2

Description

............................................ 2

4.7

Power Supplies

...................................... 37

1.2.1

Device Compatibility

................................. 4

4.8

Reset

................................................ 38

1.3

Functional Block Diagram

............................ 5

4.9

Dual Data Movement Accelerator (dMAX)

.......... 39

Device Overview

......................................... 7

4.10

External Interrupts

................................... 44

2.1

Device Characteristics

................................ 7

4.11

External Memory Interface (EMIF)

.................. 45

2.2

Enhanced C67x+ CPU

............................... 8

4.12

Universal Host-Port Interface (UHPI) [C6727B

Only]

................................................. 56

2.3

CPU Interrupt Assignments

........................... 9

4.13

Multichannel Audio Serial Ports (McASP0, McASP1,

2.4

Internal Program/Data ROM and RAM

.............. 10

and McASP2)

........................................ 70

2.5

Program Cache

...................................... 11

4.14

Serial Peripheral Interface Ports (SPI0, SPI1)

...... 82

2.6

High-Performance Crossbar Switch

................. 12

4.15

Inter-Integrated Circuit Serial Ports (I2C0, I2C1)

... 95

2.7

Memory Map Summary

............................. 15

4.16

Real-Time Interrupt (RTI) Timer With Digital

2.8

Boot Modes

.......................................... 16

Watchdog

............................................ 99

2.9

Pin Assignments

.................................... 19

4.17

External Clock Input From Oscillator or CLKIN Pin 102

2.10

Development

........................................ 26

4.18

Phase-Locked Loop (PLL)

......................... 104

Device Configurations

................................. 30

Application Example

................................. 107

3.1

Device Configuration Registers

..................... 30

Revision History

...................................... 108

3.2

Peripheral Pin Multiplexing Options

................. 30

Mechanical Data

....................................... 109

3.3

Peripheral Pin Multiplexing Control

................. 31

7.1

Package Thermal Resistance Characteristics

..... 109

Peripheral and Electrical Specifications

........... 33

7.2

Supplementary Information About the 144-Pin RFP

4.1

Electrical Specifications

............................. 33

PowerPAD™ Package

............................. 110

4.2

Absolute Maximum Ratings

......................... 33

7.3

Packaging Information

............................. 110

4.3

Recommended Operating Conditions

............... 33

Contents

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