PCF2127ATSLASH1 datasheet(9/80 Pages) NXP

9 / 80 page

PCF2127A_2

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 02 — 7 May 2010

9 of 80

NXP Semiconductors

PCF2127A

Integrated RTC, TCXO and quartz crystal

8.2 Control registers

PCF2127A has 30 8-bit registers. The first 3 registers with the addresses 00h, 01h, and

02h are used as control registers.

8.2.1 Register Control_1

[1]

Default value.

[2]

When writing to the register this bit has always to be set logic 0.

Table 5.

Control_1 - control and status register 1 (address 00h) bit description

Bit

Symbol

Value

Description

Reference

EXT_TEST

[1]

normal mode

Section 8.14

external clock test mode

[2]

unused

5STOP

[1]

RTC source clock runs

Section 8.15

RTC clock is stopped;

RTC divider chain flip-flops are

asynchronously set logic 0;

CLKOUT at 32.768 kHz, 16.384 kHz, or

8.192 kHz is still available

4TSF1

[1]

no timestamp interrupt generated

Section 8.12.1

flag set when TS input is driven to an

intermediate level between power supply

and ground;

flag must be cleared to clear interrupt

3POR_OVRD

[1]

Power-On Reset Override (PORO) facility

disabled;

set logic 0 for normal operation

Section 8.8.2

PORO enabled

12_24

[1]

24 hour mode selected

Table 22

12 hour mode selected

[1]

minute interrupt disabled

Section 8.13

minute interrupt enabled

0SI

[1]

second interrupt disabled

second interrupt enabled

PCF2127AT/1 数据表(PDF) 9 Page - NXP Semiconductors

PCF2127AT/1 数据表(HTML) 9 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

数据表下载