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PCF2127AT/1 数据表(PDF) 12 Page - NXP Semiconductors |
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PCF2127AT/1 数据表(HTML) 12 Page - NXP Semiconductors |
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12 / 80 page ![]() PCF2127A_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 7 May 2010 12 of 80 NXP Semiconductors PCF2127A Integrated RTC, TCXO and quartz crystal 8.3 Register CLKOUT_ctl 8.3.1 Temperature compensated crystal oscillator The frequency of tuning fork quartz crystal oscillators is temperature-dependent. In the PCF2127A the frequency drift caused by temperature variation is corrected by adjusting the load capacitance of the crystal oscillator. The load capacitance is changed by switching between two load capacitance values using a modulation signal with a programmable duty cycle. Every chip is calibrated in order to produce, at the measured temperature, the correct duty cycle which compensates for the frequency drift. The frequency accuracy can be evaluated by measuring the frequency of the square wave signal available at the output pin CLKOUT. However, the selection of fCLKOUT = 32.768 kHz (default value) leads to inaccurate measurements. The most accurate frequency measurement occurs when fCLKOUT = 1 Hz is selected (see Table 10). 8.3.1.1 Temperature measurement The PCF2127A has a temperature sensor circuit used to perform the temperature compensation of the frequency. The temperature is measured immediately after power-on and then periodically with a period set by the temperature conversion rate TCR[1:0] in the register CLKOUT_ctl. [1] Default value. 8.3.2 Clock output A programmable square wave is available at pin CLKOUT. Operation is controlled by the COF[2:0] control bits in register CLKOUT_ctl. Frequencies of 32.768 kHz (default) down to 1 Hz can be generated for use as a system clock, microcontroller clock, input to a charge pump, or for calibration of the oscillator. CLKOUT is an open-drain output and enabled at power-on. When disabled, the output is high-impedance. The duty cycle of the selected clock is not controlled, however, due to the nature of the clock generation all but the 32.768 kHz frequencies will be 50 : 50. Table 8. CLKOUT_ctl - CLKOUT control register (address 0Fh) bit description Bit Symbol Value Description 7 to 6 TCR[1:0] see Table 9 temperature measurement period 5 to 3 - - unused 2 to 0 COF[2:0] see Table 10 CLKOUT frequency selection Table 9. Temperature measurement period TCR[1:0] Temperature measurement period 00 [1] 4min 01 2 min 10 1 min 11 30 seconds |
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