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TCA6507ZXUR 数据表(PDF) 12 Page - Texas Instruments |
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TCA6507ZXUR 数据表(HTML) 12 Page - Texas Instruments |
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12 / 32 page ![]() www.ti.com TCA6507 LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER WITH INTENSITY CONTROL AND SHUTDOWN SCPS164B – MAY 2007 – REVISED NOVEMBER 2007 Table 16. One-Shot / Master Intensity Register BIT DESCRIPTION 0–3 Master intensity (ALD) value. Valid values are 0 to 15. Determines whether maximum intensity of PWM0 is set by the programmed F value or the master ALD value 4 0 = F value 1 = ALD value Determines whether maximum intensity of PWM1 is set by the programmed F value or the master ALD value 5 0 = F value 1 = ALD value Determines if PWM0 operates in normal or one-shot mode 6 0 = Normal mode 1 = One-shot mode Determines if PWM1 operates in normal or one-shot mode 7 0 = Normal mode 1 = One-shot mode The Initialization register (register 10) determines whether to initialize each PWM and, if so, provides the starting point of the LED intensity cycle for each bank. Bits 0–3 (C0–C3) are for BANK0 and bits 4–7 (C4–C7) are for BANK1. Bits 0–2 provide the starting point for PWM0. If bit 3 is high (or 1), it initializes PWM0. Bits 4–6 provide the starting point for PWM1. If bit 7 is high (or 1), it initialized PWM1. In the one-shot mode for BANK0, the LEDs start at the beginning of the region defined by C2, C1, and C0 in the Initialization register and, when it reaches the end of that region, the LED stays at that intensity level defined at the end of the region. When the stop point is reached, all P ports attached to PWM0 disconnect from PWM0 and stay at either the maximum intensity level for PWM0 (BRIGHT_F0 or ALD value) or the OFF state. The bits in the Select2 and Select1 registers change to reflect the final state of the LED at that time. PWM0 continues running and is free to be used by other LEDs. The one-shot mode works similarly for BANK1. Upon writing to this register, each bank is initialized to the state listed in Table 18 and Table 19. Table 17. Register 10 (Initialization Register) BANK BANK1 BANK0 BIT C7 C6 C5 C4 C3 C2 C1 C0 Table 18. BANK1 C6 C5 C4 INTENSITY CYCLE 0 0 0 Beginning at region A1 in Table 15 and Figure 6 0 0 1 Beginning at region B1 in Table 15 and Figure 6 0 1 0 Beginning at region C1 in Table 15 and Figure 6 0 1 1 Beginning at region D in Table 15 and Figure 6 1 0 0 Beginning at region A2 in Table 15 and Figure 6 1 0 1 Beginning at region B2 in Table 15 and Figure 6 1 1 0 Beginning at region C2 in Table 15 and Figure 6 1 1 1 Beginning at region E in Table 15 and Figure 6 12 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TCA6507 |
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