MCP4901-ESLASHMS datasheet(17/50 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS22248A-page 17

MCP4901/4911/4921

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

Supply Voltage Pins (VDD, VSS)

VDD is the positive supply voltage input pin. The input

supply voltage is relative to VSS and can range from

2.7V to 5.5V. The power supply at the VDD pin should

be as clean as possible for good DAC performance. It

is recommended to use an appropriate bypass capaci-

tor of about 0.1 µF (ceramic) to ground. An additional

10 µF capacitor (tantalum) in parallel is also recom-

mended to further attenuate high-frequency noise

present in application boards.

VSS is the analog ground pin and the current return path

of the device. The user must connect the VSS pin to a

ground plane through a low-impedance connection. If

an analog ground path is available in the application

Printed Circuit Board (PCB), it is highly recommended

that the VSS pin be tied to the analog ground path or

isolated within an analog ground plane of the circuit

board.

3.2

Chip Select (CS)

CS is the chip select input, which requires an active-low

signal to enable serial clock and data functions.

3.3

Serial Clock Input (SCK)

SCK is the SPI compatible serial clock input.

3.4

Serial Data Input (SDI)

SDI is the SPI compatible serial data input.

3.5

Latch DAC Input (LDAC)

The LDAC (latch DAC synchronization input) pin is

used to transfer the input latch register to the DAC reg-

ister (output latches, VOUT). When this pin is low, VOUT

is updated with input register content. This pin can be

tied to low (VSS) if the VOUT update is desired at the

rising edge of the CS pin. This pin can be driven by an

external control device such as an MCU I/O pin.

3.6

Analog Output (VOUT)

VOUT is the DAC analog output pin. The DAC output

has an output amplifier. The full-scale range of the DAC

output is from VSS to G*VREF, where G is the gain

selection option (1x or 2x). The DAC analog output

cannot go higher than the supply voltage (VDD).

3.7

Voltage Reference Input (VREF)

VREF is the voltage reference input for the device. The

reference on this pin is utilized to set the reference

voltage on the string DAC. The input voltage can range

from VSS to VDD. This pin can be tied to VDD.

3.8

Exposed Thermal Pad (EP)

There is an internal electrical connection between the

Exposed Thermal Pad (EP) and the VSS pin. They must

be connected to the same potential on the PCB.

TABLE 3-1:

PIN FUNCTION TABLE

PDIP, MSOP, SOIC

DFN

Symbol

Description

VDD

Supply Voltage Input (2.7V to 5.5V)

Chip Select Input

SCK

Serial Clock Input

SDI

Serial Data Input

LDAC

DAC Output Synchronization Input. This pin is used to transfer

the input register (DAC settings) to the output register (VOUT)

VREF

Voltage Reference Input

VSS

Ground reference point for all circuitry on the device

VOUT

DAC Analog Output

—

Exposed Thermal Pad. This pad must be connected to VSS in

application

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