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L99PD08 数据表(PDF) 22 Page - STMicroelectronics |
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L99PD08 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 41 page ![]() SPI L99PD08 22/41 Doc ID 15872 Rev 3 6 SPI VDDIO = 3.15 V to 5.25 V, VCORE3 = 3.15 V to 3.4 V, Tj = -40 to 150 °C, unless otherwise specified. The voltages are referred to GND and currents are assumed positive, when the current flows into the pin Table 16. DC characteristics Symbol Parameter Test condition Min Typ Max Unit SDI, SCK, CSN, CLK_INx VIL Input low voltage VDDIO = 3.3 V, increasing 2.0 V VIH Input high voltage VDDIO = 3.3 V, decreasing 1.2 V RCSN in CSN pull up resistor 110 150 210 kΩ RSCK in SCK pull down resistor 50 100 150 kΩ RSDI in SDI pull down resistor 50 100 150 kΩ RCLK_INx CLK_INx pull down resistor 50 100 150 kΩ VCLAMPP Positive clamping voltage 7 10 V VCLAMPN Negative clamping voltage -20 -16 V SDO VOL Output low voltage Iout = 5 mA 0.4 V VOH Output high voltage Iout = 5 mA VDDIO – 1.0 V VCLAMPP Positive clamping voltage 7 10 V VCLAMPN Negative clamping voltage -20 -16 V Table 17. Dynamic characteristics Symbol Parameter Test condition Min Typ Max Unit fSCK Serial clock frequency 1 4 MHz tCSNQV CSN falling until SDO valid Cout = 50 pF 50 ns tCSNQT CSN rising until SDO tristate Cout = 50 pF 150 ns tSCKQV SCK rising until SDO valid Cout = 50 pF 100 ns tSCSN CSN setup time before SCK rising 125 ns tSSDI SDI setup time before SCK rising 20 ns tHSCK Minimum SCK high time 100 ns tLSCK Minimum SCK low time 100 ns |
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