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P89LPC9331FDH 数据表(PDF) 10 Page - NXP Semiconductors

部件名 P89LPC9331FDH
功能描述  8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs
PDF  93 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

P89LPC9331FDH 数据表(HTML) 10 Page - NXP Semiconductors

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P89LPC9331_9341_9351_9361_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 2 June 2009
10 of 93
NXP Semiconductors
P89LPC9331/9341/9351/9361
8-bit microcontroller with accelerated two-clock 80C51 core
P2.0 to P2.7
I/O
Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type. During reset
Port 2 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 2 pins as inputs and outputs depends upon the
port configuration selected. Each port pin is configured independently. Refer to
Section 7.16.1 “Port configurations” and Table 12 “Static characteristics” for
details.
All pins have Schmitt trigger inputs.
Port 2 also provides various special functions as described below:
P2.0/ICB/DAC0
/AD03
1
I/O
P2.0 — Port 2 bit 0.
I
ICB — Input Capture B. (P89LPC9351/9361)
O
DAC0 — Digital-to-analog converter output.
I
AD03 — ADC0 channel 3 analog input.
P2.1/OCD/AD02
2
I/O
P2.1 — Port 2 bit 1.
O
OCD — Output Compare D. (P89LPC9351/9361)
I
AD02 — ADC0 channel 2 analog input.
P2.2/MOSI
13
I/O
P2.2 — Port 2 bit 2.
I/O
MOSI — SPI master out slave in. When configured as master, this pin is output;
when configured as slave, this pin is input.
P2.3/MISO
14
I/O
P2.3 — Port 2 bit 3.
I/O
MISO — When configured as master, this pin is input, when configured as slave,
this pin is output.
P2.4/SS
15
I/O
P2.4 — Port 2 bit 4.
I
SS — SPI Slave select.
P2.5/SPICLK
16
I/O
P2.5 — Port 2 bit 5.
I/O
SPICLK — SPI clock. When configured as master, this pin is output; when
configured as slave, this pin is input.
P2.6/OCA
27
I/O
P2.6 — Port 2 bit 6.
O
OCA — Output Compare A. (P89LPC9351/9361)
P2.7/ICA
28
I/O
P2.7 — Port 2 bit 7.
I
ICA — Input Capture A. (P89LPC9351/9361)
P3.0 to P3.1
I/O
Port 3: Port 3 is a 2-bit I/O port with a user-configurable output type. During reset
Port 3 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 3 pins as inputs and outputs depends upon the
port configuration selected. Each port pin is configured independently. Refer to
Section 7.16.1 “Port configurations” and Table 12 “Static characteristics” for
details.
All pins have Schmitt trigger inputs.
Port 3 also provides various special functions as described below:
Table 3.
Pin description …continued
Symbol
Pin
Type Description
PLCC28,
TSSOP28



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