PCF2113AUSLASH10SLASHF4 datasheet(10/65 Pages) NXP

10 / 65 page

PCF2113_FAM_4

Product data sheet

Rev. 04 — 4 March 2008

10 of 65

NXP Semiconductors

PCF2113x

LCD controllers/drivers

Functional description

8.1 LCD supply voltage generator

The LCD supply voltage (VLCD) may be generated on-chip. The VLCD generator is

controlled by two internal 6-bit registers: VA and VB. Section 10.10.1 shows how to

program these registers. The nominal LCD operating voltage at room temperature is given

by the relationship:

Voper(nom) = (integer value of register × 0.08 V) + 1.82 V

With a programmed value from 1 to 63, Voper(nom) = 1.90 V to 6.86 V at Tamb =27 °C.

Values producing more than 6.5 V at operating temperature are not allowed. Operation

above this voltage may damage the device. When programming the operating voltage the

VLCD tolerance and temperature coefﬁcient must be taken into account.

Values below 2.2 V are below the speciﬁed operating range of the chip and therefore are

not allowed.

Value 0 for VA and VB switches off the generator (i.e. VA = 0 in Character mode, VB = 0 in

Icon mode).

Usually register VA is programmed with the voltage for Character mode and register VB

with the voltage for Icon mode.

When VLCD is generated on-chip, the VLCD pins must be decoupled to VSS with a suitable

capacitor.

The generated VLCD is independent of VDD and is temperature compensated. When the

VLCD generator and the Direct mode are switched off, an external voltage may be supplied

at pins VLCDIN and VLCDOUT (which are connected together). VLCDIN and VLCDOUT may be

higher or lower than VDD2.

During Direct mode (program DM bit) the internal VLCD generator is turned off and the

VLCDOUT output voltage is directly connected to VDD2. This reduces the current

consumption during Icon mode and MUX 1:9 (depending on VDD2 and LCD liquid

properties).

The VLCD generator ensures that, as long as VDD is in the valid range (2.2 V to 4 V), the

required peak operating voltage of 6.5 V can be generated at any time.

8.2 LCD bias voltage generator

The intermediate bias voltages for the LCD display are also generated on-chip. This

removes the need for an external resistive bias chain and signiﬁcantly reduces the system

current consumption. The optimum value of VLCD depends on the multiplex rate, the LCD

threshold voltage (Vth) and the number of bias levels. Using a 5-level bias scheme for 1:18

maximum rate allows VLCD < 5 V for most LCD liquids. The intermediate bias levels for the

different multiplex rates are shown in Table 6. These bias levels are automatically set to

the given values when switching to the corresponding multiplex rate.

PCF2113AU/10/F4 数据表(PDF) 10 Page - NXP Semiconductors

PCF2113AU/10/F4 数据表(HTML) 10 Page - NXP Semiconductors

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