ADP8863ACPZ-R7 datasheet(27/48 Pages) AD

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ADP8863

Rev. 0 | Page 27 of 48

Manufacturer and Device ID (MFDVID)—Register 0x00

This is a read-only register.

Table 10. MFDVID Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Manufacturer ID

Device ID

Mode Control Register (MDCR)—Register 0x01

Table 11. MDCR Bit Map

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reserved

INT_CFG

nSTBY

DIM_EN

GDWN_DIS

SIS_EN

CMP_AUTOEN

BL_EN

Table 12. Bit Descriptions for the MDCR Register

Bit Name

Bit No.

Description

N/A

Reserved.

INT_CFG

Interrupt configuration.

1 = processor interrupt deasserts for 50 μs and reasserts with pending events.

0 = processor interrupt remains asserted if the host tries to clear the interrupt while there is a pending event.

nSTBY

1 = device is in active mode.

0 = device is in standby mode; only the I2C interface is enabled.

DIM_EN

DIM_EN is set by the hardware after a dim timeout. The user may also force the backlight into dim mode by

asserting this bit. Dim mode can only be entered if BL_EN is also enabled.

1 = backlight is operating at the dim current level (BL_EN must also be asserted).

0 = backlight is not in dim mode.

GDWN_DIS

Gain down disable bit. Setting this bit does not allow the charge pump to switch to lower gains.

1 = the charge pump does not switch down in gain until all LEDs are off. The charge pump switches up in gain as

needed. This feature is useful if the ADP8863 charge pump is used to drive an external load. This feature must be

used when utilizing small fly capacitors (0402 or smaller).

0 = the charge pump automatically switches up and down in gain. This provides optimal efficiency, but is not

suitable for driving loads that are not connected through the ADP8863 diode drivers. Additionally, the charge

pump fly capacitors should be low ESR and sized 0603 or greater.

SIS_EN

Synchronous independent sinks enable.

1 = enables all LED current sinks designated as independent sinks. All of the ISC enable bits must be cleared;

if any of the SCx_EN bits in Register 0x10 are set, this bit has no effect.

0 = disables all sinks designated as independent sinks. All of the ISC enable bits must be cleared; if any of the

SCx_EN bits in Register 0x10 are set, this bit has no effect.

CMP_AUTOEN

1 = backlight automatically responds to the comparator outputs (L2_OUT and L3_OUT). L2_EN and/or L3_EN

must be set for this to function. BLV values in Register 0x04 are overridden.

0 = backlight does not respond automatically to comparator level changes. The user can manually select

backlight operating levels using Bit BLV in Register 0x04.

BL_EN

1 = backlight is enabled (nSTBY must also be asserted).

0 = backlight is disabled.

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