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LTC4360ISC8-2TRMPBF 数据表(PDF) 6 Page - Linear Technology |
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LTC4360ISC8-2TRMPBF 数据表(HTML) 6 Page - Linear Technology |
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6 / 12 page ![]() LTC4360-1/LTC4360-2 6 436012f OPERATION Mobile devices like cell phones and MP3/MP4 players have highly integrated subsystems fabricated from deep submi- cronCMOSprocesses.Thesmallformfactorisaccompanied by low absolute maximum voltage ratings. The sensitive electronics are susceptible to damage from transient or DC overvoltage conditions from the power supply. Failures or faults in the power adaptor can cause an over- voltage event. So can hot-plugging an AC adaptor into the power input of the mobile device (see LTC Application Note 88). Today’s mobile devices derive their power supply or recharge their internal batteries from multiple alternative inputs like AC wall adaptors, car battery adaptors and USB ports. A user may unknowingly plug in the wrong adaptor, damaging the device with a high or even a negative power supply voltage. The LTC4360 protects low voltage electronics from these overvoltage conditions by controlling a low cost external N-channel MOSFET configured as a pass transistor. At power-up (VIN > 2.1V), a start-up delay cycle begins. Any overvoltage condition causes the delay cycle to continue until a safe voltage is present. When the delay cycle completes, an internal high side switch driver slowly ramps up the MOSFET gate, powering up the output at a controlled rate and limiting the inrush current to the output capacitor. If the voltage at the IN pin exceeds 5.8V (VIN(OV)), GATE is pulled low quickly to protect the load. The incoming power supply must remain below 5.7V (VIN(OV) – ΔVOV) for the duration of the start-up delay to restart the GATE ramp-up. The LTC4360-1 has a CMOS compatible ON input. When driven low, the part is enabled. When driven high, the external N-channel MOSFET is turned off and the supply current of the LTC4360-1 drops to 1.5μA. The PWRGD pull-down releases during this low current sleep mode, UVLO or overvoltage and the subsequent 130ms start-up delay. After the start-up delay, GATE starts its slow ramp- up and ramps higher than VGATE(TH) to trigger a 65ms delay cycle. When that completes, PWRGD pulls low. The LTC4360-2 has a GATEP pin that drives an optional external P-channel MOSFET to provide protection against negative voltages at IN. The typical LTC4360 application protects 2.5V to 5.5V sys- tems in portable devices from power supply overvoltage. The basic application circuit is shown in Figure 1. Device operation and external component selection is discussed in detail in the following sections. Start-Up When VIN is less than the undervoltage lockout level of 2.1V, the GATE driver is held low and the PWRGD pull- down is high impedance. When VIN rises above 2.1V and ON (LTC4360-1) is held low, a 130ms delay cycle starts. Any undervoltage or overvoltage event at IN (VIN < 2.1V or VIN > 5.7V) restarts the delay cycle. This delay allows the N-channel MOSFET to isolate the output from any input transients that occur at start-up. When the delay cycle completes, GATE starts its slow ramp-up. GATE Control An internal charge pump enhances the external MOSFET with 6V from GATE to OUT. This allows the use of logic- level N-channel MOSFETs. An internal 6V clamp between GATE and OUT protects the MOSFET gate. APPLICATIONS INFORMATION GATE COUT 10μF M1 Si1470DH IN 436012 F01 VOUT 5V 1.5A VIN 5V LTC4360-1 ON OUT PWRGD GND Figure 1. Protection from Input Overvoltage |
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