HT66F40 datasheet(90/250 Pages) HOLTEK

90 / 250 page

HT66F20/HT66F30/HT66F40/HT66F50/HT66F60

HT66FU30/HT66FU40/HT66FU50/HT66FU60

Rev. 1.20

June 4, 2010

These three bits are used to setup the value on the internal CCRP 3-bit register, which are then

compared with the internal counter's highest three bits. The result of this comparison can be

selected to clear the internal counter if the T0CCLR bit is set to zero. Setting the T0CCLR bit to

zero ensures that a compare match with the CCRP values will reset the internal counter. As the

CCRP bits are only compared with the highest three counter bits, the compare values exist in 128

clock cycle multiples. Clearing all three bits to zero is in effect allowing the counter to overflow at

its maximum value.

· TM0C1 Register

Bit

76543210

Name

T0M1

T0M0

T0IO1

T0IO0

T0OC

T0POL

T0DPX

T0CCLR

R/W

POR

00000000

Bit 7~6

T0M1~T0M0: Select TM0 Operating Mode

00: Compare Match Output Mode

01: Undefined Mode

10: PWM Mode

11: Timer/Counter Mode

These bits setup the required operating mode for the TM. To ensure reliable operation the TM

should be switched off before any changes are made to the T0M1 and T0M0 bits. In the

Timer/Counter Mode, the TM output pin control must be disabled.

Bit 5~4

T0IO1~T0IO0: Select TP0_0, TP0_1 output function

Compare Match Output Mode

00: No change

01: Output low

10: Output high

11: Toggle output

PWM Mode

00: Force inactive state

01: Force active state

10: PWM output

11: Undefined

Timer/counter Mode

unused

These two bits are used to determine how the TM output pin changes state when a certain

condition is reached. The function that these bits select depends upon in which mode the TM is

running.

In the Compare Match Output Mode, the T0IO1 and T0IO0 bits determine how the TM output

pin changes state when a compare match occurs from the Comparator A. The TM output pin can

be setup to switch high, switch low or to toggle its present state when a compare match occurs

from the Comparator A. When the bits are both zero, then no change will take place on the

output. The initial value of the TM output pin should be setup using the T0OC bit in the TM0C1

the initial value setup using the T0OC bit otherwise no change will occur on the TM output pin

when a compare match occurs. After the TM output pin changes state it can be reset to its initial

level by changing the level of the T0ON bit from low to high.

Bit 3

T0OC: TP0_0, TP0_1 Output control bit

Compare Match Output Mode

0: Initial low

1: Initial high

PWM Mode

0: Active low

1: Active high

This is the output control bit for the TM output pin. Its operation depends upon whether TM is

being used in the Compare Match Output Mode or in the PWM Mode. It has no effect if the TM is

in the Timer/Counter Mode. In the Compare Match Output Mode it determines the logic level of

the TM output pin before a compare match occurs. In the PWM Mode it determines if the PWM

signal is active high or active low.

HT66F40 数据表(PDF) 90 Page - Holtek Semiconductor Inc

HT66F40 数据表(HTML) 90 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载