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PIC18F2510-E/ML 数据表(PDF) 48 Page - Microchip Technology |
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PIC18F2510-E/ML 数据表(HTML) 48 Page - Microchip Technology |
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48 / 376 page ![]() PIC18F2X1X/4X1X DS39636D-page 50 © 2009 Microchip Technology Inc. 4.6 Reset State of Registers Most registers are unaffected by a Reset. Their status is unknown on POR and unchanged by all other Resets. The other registers are forced to a “Reset state” depending on the type of Reset that occurred. Most registers are not affected by a WDT wake-up, since this is viewed as the resumption of normal oper- ation. Status bits from the RCON register, RI, TO, PD, POR and BOR, are set or cleared differently in different Reset situations, as indicated in Table 4-3. These bits are used in software to determine the nature of the Reset. Table 4-4 describes the Reset states for all of the Special Function Registers. These are categorized by Power-on and Brown-out Resets, Master Clear and WDT Resets and WDT wake-ups. TABLE 4-3: STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR RCON REGISTER Condition Program Counter RCON Register STKPTR Register SBOREN RI TO PD POR BOR STKFUL STKUNF Power-on Reset 0000h 1 111 00 0 0 RESET instruction 0000h u(2) 0uu uu u u Brown-out Reset 0000h u(2) 111 u0 u u MCLR during power-managed Run modes 0000h u(2) u1u uu u u MCLR during power-managed Idle modes and Sleep mode 0000h u(2) u10 uu u u WDT time-out during full power or power-managed Run mode 0000h u(2) u0u uu u u MCLR during full power execution 0000h u(2) uuu uu u u Stack Full Reset (STVREN = 1) 0000h u(2) uuu uu 1 u Stack Underflow Reset (STVREN = 1) 0000h u(2) uuu uu u 1 Stack Underflow Error (not an actual Reset, STVREN = 0) 0000h u(2) uuu uu u 1 WDT Time-out during power-managed Idle or Sleep modes PC + 2 u(2) u00 uu u u Interrupt exit from power-managed modes PC + 2(1) u(2) uu0 uu u u Legend: u = unchanged Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the interrupt vector (008h or 0018h). 2: Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled (BOREN1:BOREN0 Configuration bits = 01 and SBOREN = 1); otherwise, the Reset state is ‘0’. |
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