LTC2453_1 datasheet(12/18 Pages) LINER

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LTC2453

2453fb

Optional input capacitors CIN are also connected to the

ADC input pins. This capacitor is placed in parallel with

the ADC input parasitic capacitance CPAR. Depending

on the PCB layout, CPAR has typical values between 2pF

and 15pF. In addition, the equivalent circuit of Figure 9

includes the converter equivalent internal resistor RSW

and sampling capacitor CEQ.

There are some immediate trade-offs in RS and CIN without

needing a full circuit analysis. Increasing RS and CIN can

give the following beneﬁts:

1) Due to the LTC2453’s input sampling algorithm, the

input current drawn by either VIN+ or VIN– over a

conversion cycle is 50nA. A high RS • CIN attenuates

the high frequency components of the input current,

and RS values up to 1k result in <1LSB error.

2) The bandwidth from VSIG is reduced at the input pins

(IN+, IN–). This bandwidth reduction isolates the ADC

from high frequency signals, and as such provides

simple antialiasing and input noise reduction.

3) Switching transients generated by the ADC are attenu-

ated before they go back to the signal source.

4) A large CIN gives a better AC ground at the input pins,

helping reduce reﬂections back to the signal source.

5) Increasing RS protects the ADC by limiting the current

during an outside-the-rails fault condition.

There is a limit to how large RS • CIN should be for a given

Figure 10. Measured INL vs Input Voltage,

CIN = 0.1μF, VCC = 5V, TA = 25°C

application. Increasing RS beyond a given point increases

the voltage drop across RS due to the input current,

to the point that signiﬁcant measurement errors exist.

Additionally, for some applications, increasing the RS• CIN

product too much may unacceptably attenuate the signal

at frequencies of interest.

For most applications, it is desirable to implement CIN as

a high-quality 0.1μF ceramic capacitor and RS ≤ 1k. This

capacitor should be located as close as possible to the

actual VINpackagepin.Furthermore,theareaencompassed

by this circuit path, as well as the path length, should be

minimized.

In the case of a 2-wire sensor that is not remotely

grounded, it is desirable to split RS and place series

resistors in the ADC input line as well as in the sensor

ground return line, which should be tied to the ADC GND

pin using a star connection topology.

Figure 10 shows the measured LTC2453 INL vs Input

Voltage as a function of RS value with an input capacitor

CIN = 0.1μF.

In some cases, RScanbeincreasedabovetheseguidelines.

The input current is zero when the ADC is either in sleep

or I/O modes. Thus, if the time constant of the input RC

circuit

τ = RS • CIN, is of the same order of magnitude or

longer than the time periods between actual conversions,

then one can consider the input current to be reduced

correspondingly.

Figure 11. Measured INL vs Input Voltage,

CIN = 0, VCC = 5V, TA = 25°C

APPLICATIONS INFORMATION

DIFFERENTIAL INPUT VOLTAGE (V)

–5

2453 F10

–2

–6

–4

–8

–10

–3

–4

–1

–2

RS = 10k

RS = 2k

RS = 1k

RS = 0

CIN = 0.1μF

VCC = 5V

TA = 25°C

DIFFERENTIAL INPUT VOLTAGE (V)

–5

2453 F11

–2

–6

–4

–8

–10

–3

–4

–1

–2

RS = 10k

RS = 1k, 2k

RS = 0

CIN = 0

VCC = 5V

TA = 25°C

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