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STM6510 数据表(PDF) 15 Page - STMicroelectronics |
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STM6510 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 26 page ![]() STM6510 DC and AC parameters Doc ID 16788 Rev 2 15/26 Table 6. DC and AC characteristics Symbol Parameter Test conditions(1) Min. Typ.(2) Max. Units VCC Supply voltage range Reset output valid - active-low 1.0 5.5 V ICC Supply current (VCC) VCC = 5.0 V 1.5 2.4 µA VCC = 3.0 V (3) 1.4 µA VOL Reset output voltage low VCC ≥ 4.5 V, sinking 3.2 mA 0.3 V VCC ≥ 3.3 V, sinking 2.5 mA 0.3 V VCC ≥ 1.0 V, sinking 0.1 mA 0.3 V VRST VCC undervoltage reset threshold (refer to Table 7) –40 to +85 °C VRST –2.5% VRST VRST +2.5% V 25 °C VRST –2.0% VRST VRST +2.0% V VHYST Hysteresis of VRST L, M 0.5% T, S, R, Z, Y, W, V 1% VCC to reset delay (4) VCC falling from (VRST + 100 mV) to (VRST - 100 mV) at 10 mV/µs 20 µs tREC (4) User-adjustable reset timeout period on RST. Refer to Table 3. 10 000 x CtREC (µF) 15 000 x CtREC (µF) 20 000 x CtREC (µF) ms Smart Reset™ inputs tSRC (5) User-adjustable delayed Smart Reset™ setup time. Refer to Table 2. 10 x CSRC (µF) 15 x CSRC (µF) 20 x CSRC (µF) s VIL SR0, SR1 input voltage low 0.3 VCC V VIH SR0, SR1 input voltage high 0.7 VCC V RPUI Internal pull-up resistor, SR0, SR1 inputs 65 k Ω 1. Valid for ambient operating temperature: TA = –40 to +85 °C; VCC = 1.0 to 5.5 V (except where noted). 2. Typical value is at 25 °C and VCC = 3.3 V unless otherwise noted. 3. For devices with VRST < 3.0 V. 4. Guaranteed by design. 5. Input glitch immunity is equal to tSRC (when both SR inputs are low, otherwise infinite). |
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