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KB8821 数据表(PDF) 15 Page - Samsung semiconductor |
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KB8821 数据表(HTML) 15 Page - Samsung semiconductor |
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15 / 21 page ![]() PRELIMINARY SPECIFICATION (V1.5) FREQUENCY SYNTHESIZER KB8821/22/23 15 99-06-15 FUNCTIONAL DESCRIPTION- Continued ♦ Powerdown mode operation There are synchronous and asynchronous powerdown modes for KB8821/22/23. Synchronous powerdown mode occurs if R18 bit is LOW, N20 bit is HIGH and charge pump output is in high impedance state. In the synchronous power down mode, the powerdown function is activated by the charge pump to diminish unwanted frequency jumps. Asynchronous powerdown mode occurs if R18 bit is HIGH and N20 bit is HIGH. When the PLL goes to either synchronous or asynchronous powerdown mode, preamp becomes debiased, R & N counters keeps their load conditions and the charge pump becomes high impedance state. The oscillator cir- cuitry function becomes disabled only when both IF and RF powerdown bits are activated, i.e. N20 HIGH. The PLL returns to an active powerup mode when N20 bit becomes LOW(either in synchronous or asynchronous modes). Phase Detector and Charge pump Characteristics Phase difference detection range : -2 π ~ +2π When R16 = HIGH R18 N20 Powerdown mode status 0 0 PLL active 1 0 PLL active, only charge pump high impedance 0 1 Synchronous powerdown 1 1 Asynchronous powerdown fr fp LD fr>fp fr=fp fr<fp fr<fp fr<fp CPo |
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