116 datasheet(24/50 Pages) RENESAS

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REJ03B0253-0110

Rev.1.10

Page 24 of 95

Jun 23, 2010

R32C/116 Group

2. Central Processing Unit (CPU)

Central Processing Unit (CPU)

The CPU contains registers as shown below. There are two register banks each consisting of registers

R2R0, R3R1, R6R4, R7R5, A0 to A3, SB, and FB.

Figure 2.1

CPU Registers

DDA0

DDR0

DSA0

DSR0

DDA0

DCR0

DCT0

DMD0

DDR0

DSA0

DSR0

DDA0

DCR0

DCT0

DMD0

DDR0

DSA0

DSR0

DDA0

DCR0

DCT0

DMD0

DDR0

DSA0

DSR0

DCR0

DCT0

DMD0

b31

VCT

SVP

SVF

INTB

USP

ISP

R1L

R1H

R3L

R3H

R2H

R2L

R0H

R0L

FLG

b31

General purpose

registers

Fast interrupt

registers

DMAC-associated

registers (2)

Notes:

1.There are two banks of these registers.

2.There are four identical sets of DMAC-associated registers.

DMA destination address reload register

Flag register

Data registers (1)

Address registers (1)

Static base register (1)

Frame base register (1)

User stack pointer

Interrupt stack pointer

Interrupt vector table base register

Program counter

Save flag register

Save PC register

Vector register

R2R0

R3R1

R6R4

R7R5

DMA source address register

DMA source address reload register

DMA terminal count reload register

DMA terminal count register

DMA mode register

IPL

RND

b31

b8 b7

b16 b15

b31

b23

b15

DMA destination address register

Blank fields represent reserved.

b24 b23

b23

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