LTM4618EVPBF datasheet(13/24 Pages) LINER

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LTM4618

4618f

APPLICATIONS INFORMATION

Slope Compensation

The module has already been internally compensated

for all output voltages. The Linear Technology μModule

Power Design Tool will be provided for other control loop

optimization.

RUN Pin

The RUN pin has a 1μA pull-up current source that will

enable the device in a ﬂoat condition. A voltage divider

can be used to enable a UVLO function using the RUN

pin. See Figure 21.

Fault Conditions: Current Limit and Overcurrent

Foldback

The LTM4618 has a current mode controller, which inher-

ently limits the cycle-by-cycle inductor current not only in

steady-state operation, but also in transient.

To further limit current in the event of an overload condi-

tion, the LTM4618 provides foldback current limiting. If the

output voltage falls by more than 40%, then the maximum

output current is progressively lowered to about 25% of

its full current limit value.

Thermal Considerations and Output Current Derating

The thermal resistances reported in the Pin Conﬁguration

section of the data sheet are consistent with those param-

eters deﬁned by JESD51-9 and are intended for use with

ﬁnite element analysis (FEA) software modeling tools that

leverage the outcome of thermal modeling, simulation,

and correlation to hardware evaluation performed on a

μModule package mounted to a hardware test board—also

deﬁned by JESD51-9 (“Test Boards for Area Array Surface

Mount Package Thermal Measurements”). The motivation

for providing these thermal coefﬁcients in found in JESD

51-12 (“Guidelines for Reporting and Using Electronic

Package Thermal Information”).

Many designers may opt to use laboratory equipment

and a test vehicle such as the demo board to anticipate

the μModule regulator’s thermal performance in their ap-

plication at various electrical and environmental operating

conditions to compliment any FEA activities. Without FEA

software, the thermal resistances reported in the Pin Con-

ﬁguration section are in-and-of themselves not relevant to

providing guidance of thermal performance; instead, the

derating curves provided in the data sheet can be used in

a manner that yields insight and guidance pertaining to

one’s application-usage, and can be adapted to correlate

thermal performance to one’s own application.

The Pin Conﬁguration section shows four thermal coef-

ﬁcients explicitly deﬁned in JESD 51-12; these coefﬁcients

are quoted or paraphrased below:

•

θJA, the thermal resistance from junction to ambi-

ent, is the natural convection junction-to-ambient

air thermal resistance measured in a one cubic foot

sealed enclosure. This environment is sometimes

referred to as “still air” although natural convection

causes the air to move. This value is determined with

the part mounted to a JESD 51-9 deﬁned test board,

which does not reﬂect an actual application or viable

operating condition.

•

θJCbottom, the thermal resistance from junction to the

bottom of the product case, is the junction-to-board

thermal resistance with all of the component power

dissipation ﬂowing through the bottom of the pack-

age. In the typical μModule, the bulk of the heat ﬂows

out the bottom of the package, but there is always

heat ﬂow out into the ambient environment. As a

result, this thermal resistance value may be useful

for comparing packages but the test conditions don’t

generally match the user’s application.

•

θJCtop, the thermal resistance from junction to top of

the product case, is determined with nearly all of the

component power dissipation ﬂowing through the

top of the package. As the electrical connections of

the typical μModule are on the bottom of the pack-

age, it is rare for an application to operate such that

most of the heat ﬂows from the junction to the top of

the part. As in the case of

θJCbottom, this value may

be useful for comparing packages but the test condi-

tions don’t generally match the user’s application.

•

θJB, the thermal resistance from junction to the

printed circuit board, is the junction-to-board thermal

resistance where almost all of the heat ﬂows through

the bottom of the μModule and into the board, and

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