©1988 Fairchild Semiconductor Corporation

www.fairchildsemi.com

74ACT715, 74ACT715-R Rev. 1.3

11

than 12 CLOCK pulses on the same register will only

cause the MSB to repeat on the output. Re-scanning the

same register will require that register to be reloaded.

The value of the two horizontal counters and 1 vertical

counter can also be scanned out by using address num-

bers 51–53. Note that before the part will scan out the

data, the LOAD signal must be brought back HIGH.

Normal device operation can be resumed by loading in a

non-scan address. As the scanning of the registers is a

non-destructive scan, the device will resume correct

operation from the point at which it was halted.

RS170 Default Register Values

The tables below show the values programmed for the

RS170 Format (using a 14.31818 MHz clock signal) and

how they compare against the actual EIA RS170 Specifi-

cations. The default signals that will be output are

CSYNC, CBLANK, HDRIVE and VDRIVE. The device

initially starts at the beginning of the odd field of inter-

lace. All signals have active low pulses and the clock is

disabled at power up. Registers 13 and 14 are not

involved in the actual signal information. If the Vertical

Interrupt was selected so that a pulse indicating the

active lines would be output.

Reg

D Value H

Register Description

REG0

0

000

Status Register (715)

REG0

1024

400

Status Register (715-R)

REG1

23

017

HFP End Time

REG2

91

05B

HSYNC Pulse End Time

REG3

157

09D

HBLANK Pulse End Time

REG4

910

38E

Total Horizontal Clocks

REG5

7

007

VFP End Time

REG6

13

00D

VSYNC Pulse End Time

REG7

41

029

VBLANK Pulse End Time

REG8

525

20D

Total Vertical Lines

REG9

57

039

Equalization Pulse End Time

REG10

410

19A

Serration Pulse Start Time

REG11

1

001

Pulse Interval Start Time

REG12

19

013

Pulse Interval End Time

REG13

41

029

Vertical Interrupt Activate Time

REG14

526

20E

Vertical Interrupt Deactivate Time

REG15

911

38F

Horizontal Drive Start Time

REG16

92

05C

Horizontal Drive End Time

REG17

1

001

Vertical Drive Start Time

REG18

21

015

Vertical Drive End Time

Rate

Period

Input Clock

14.31818MHz

69.841ns

Line Rate

15.73426kHz

63.556µs

Field Rate

59.94Hz

16.683ms

Frame Rate

29.97Hz

33.367ms