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MCP98243 数据表(PDF) 14 Page - Microchip Technology |
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MCP98243 数据表(HTML) 14 Page - Microchip Technology |
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14 / 62 page ![]() MCP9843/98243 DS22153C-page 14 © 2009 Microchip Technology Inc. 4.1.5 DATA VALID After the Start condition, each bit of data in transmission needs to be settled for a time specified by tSU-DATA before SCL toggles from low-to-high (see “Sensor And EEPROM Serial Interface Timing Specifications” on Page 5). 4.1.6 ACKNOWLEDGE (ACK/NAK) Each receiving device, when addressed, is obliged to generate an ACK bit after the reception of each byte. The master device must generate an extra clock pulse for ACK to be recognized. The acknowledging device pulls down the SDA line for tSU-DATA before the low-to-high transition of SCL from the master. SDA also needs to remain pulled down for tH-DATA after a high-to-low transition of SCL. During read, the master must signal an End-of-Data (EOD) to the slave by not generating an ACK bit (NAK) once the last bit has been clocked out of the slave. In this case, the slave will leave the data line released to enable the master to generate the Stop condition. 4.1.7 TIME OUT (MCP9843/98243, SENSOR ONLY) If the SCL stays low or high for time specified by tOUT, the MCP9843/98243 temperature sensor resets the serial interface. This dictates the minimum clock speed as specified in the specification. However, the EEPROM does not reset the serial interface. Therefore, the master can hold the clock indefinitely to process data from the EEPROM. |
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