M95010-R datasheet(17/43 Pages) STMICROELECTRONICS

部件名	M95010-R

功能描述	4 Kbit, 2 Kbit and 1 Kbit serial SPI bus EEPROM with high-speed clock

PDF	43 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

17 / 43 page

M95040, M95020, M95010

Instructions

Doc ID 6512 Rev 8

17/43

6.2

Write Disable (WRDI)

One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction

to the device.

As shown in Figure 8, to send this instruction to the device, Chip Select (S) is driven low,

and the bits of the instruction byte are shifted in, on Serial Data Input (D).

The device then enters a wait state. It waits for a the device to be deselected, by Chip Select

(S) being driven high.

The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:

●

Power-up

●

WRDI instruction execution

●

WRSR instruction completion

●

WRITE instruction completion

●

Write Protect (W) line being held low.

Figure 8.

Write Disable (WRDI) sequence

AI03790D

34567

High Impedance

Instruction

M95010-R 数据表(PDF) 17 Page - STMicroelectronics