M95256 datasheet(24/48 Pages) STMICROELECTRONICS

24 / 48 page

Instructions

M95256-DR, M95256, M95256-W, M95256-R

24/48

Doc ID 12276 Rev 11

5.8

Write Identification Page (available only in M95256-DR

devices)

The Identification Page (64 bytes) is an additional page which can be written and (later)

permanently locked in Read-only mode.

Writing this page is achieved with the Write Identification Page instruction (see Table 4), the

Chip Select signal (S) is first driven low. The bits of the instruction byte, address byte, and at

least one data byte are then shifted in on Serial Data input (D). Address bit A10 must be 0,

address bits [A23:A11] and [A9:A8] are Don't Care, the [A7:A0] address bits define the byte

address inside the identification page. The instruction is terminated by driving Chip Select

(S) high at a byte boundary of the input data. The self-timed write cycle triggered by the

rising edge of Chip Select (S) continues for a period tW (as specified in Table 20), at the end

of which the Write in Progress (WIP) bit is reset to 0.

In the case of Figure 14, Chip Select (S) is driven high after the eighth bit of the data byte

has been latched in, indicating that the instruction is being used to write a single byte.

However, if Chip Select (S) continues to be driven low, as shown in Figure 14, the next byte

of input data is shifted in, so that more than a single byte, starting from the given address

towards the end of the same page, can be written in a single internal write cycle. Each time

a new data byte is shifted in, the least significant bits of the internal address counter are

incremented. If the number of data bytes sent to the device exceeds the page boundary, the

internal address counter rolls over to the beginning of the page, and the previous data there

are overwritten with the incoming data. (The page size of these devices is 64 bytes).

The instruction is not accepted, and is not executed, under the following conditions:

●

if the Write Enable Latch (WEL) bit has not been set to 1 (by previously executing a

Write Enable instruction)

●

if Status register bits (BP1, BP0) = (1, 1)

●

if a write cycle is already in progress

●

if the device has not been deselected, by Chip Select (S) being driven high, at a byte

boundary (after the eighth bit, b0, of the last data byte that was latched in)

●

if the Identification page is locked by the Lock Status bit

Figure 14.

Write Identification Page sequence

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