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PPC8567ECVTANJGA 数据表(PDF) 54 Page - Freescale Semiconductor, Inc |
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PPC8567ECVTANJGA 数据表(HTML) 54 Page - Freescale Semiconductor, Inc |
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54 / 139 page ![]() MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1 54 Freescale Semiconductor JTAG 10 JTAG This section describes the DC and AC electrical specifications for the IEEE Std 1149.1™ (JTAG) interface of the MPC8568E. 10.1 JTAG DC Electrical Characteristics Table provides the DC electrical specifications for the IEEE 1149.1 (JTAG) interface of the MPC8568E. 10.2 JTAG AC Electrical Characteristics Table 45 provides the JTAG AC timing specifications as defined in Figure 31 through Figure 33. Table 44. JTAG DC Electrical Characteristics Parameter Symbol Condition Min Max Unit Output high voltage VOH IOH = -6.0 mA 2.4 — V Output low voltage VOL IOL = 6.0 mA — 0.5 V Output low voltage VOL IOL = 3.2 mA — 0.4 V Input high voltage VIH —2.5 OVDD + 0.3 V Input low voltage VIL —-0.3 0.8 V Input current IIN 0 < VIN < OVDD — ±10 uA Table 45. JTAG AC Timing Specifications (Independent of SYSCLK) 1 At recommended operating conditions (see Table 3). Parameter Symbol 2 Min Max Unit Notes JTAG external clock frequency of operation fJTG 033.3 MHz — JTAG external clock cycle time t JTG 30 — ns — JTAG external clock pulse width measured at 1.4 V tJTKHKL 15 — ns — JTAG external clock rise and fall times tJTGR & tJTGF 02 ns 6 TRST assert time tTRST 25 — ns 3 Input setup times: Boundary-scan data TMS, TDI tJTDVKH tJTIVKH 4 0 — — ns 4 Input hold times: Boundary-scan data TMS, TDI tJTDXKH tJTIXKH 20 25 — — ns 4 Valid times: Boundary-scan data TDO tJTKLDV tJTKLOV 4 4 20 25 ns 5 Output hold times: Boundary-scan data TDO tJTKLDX tJTKLOX 30 30 — — ns 5 |
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