SC28L201 datasheet(39/110 Pages) NXP

39 / 110 page

9397 750 13138

Product data sheet

Rev. 01 — 31 October 2005

39 of 110

Philips Semiconductors

SC28L201

3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

8.1.2 Special Feature and Status Register (SFSR A and B)

8.1.3 Test and Revision Register (TRR)

Table 7:

SFSR - Special Feature and Status Register (address 0x45) bit description

Bit

Symbol

Description

7:4

reserved

Loopback error; status of loopback error check

0 = no

1 = yes (read only)

A ‘1’ indicates a loopback error occurred, which will be entered for

interrupt arbitration.

It can be cleared by the processor by a write to this register with D[3]

equal to ‘1’.

2:1

Remote loopback error check

00 = disabled

01 = enabled, RxC

← TxC

10 = enabled, RxC

← TxCN

Certiﬁcation of returned data as Valid. (This feature implies the

transmitted data is being returned by the remote receiver.)

Sets automatic checking of returned data. This mode stores transmitted

data and compares it to data returned from the remote receiver. It is used

where relative short delay times are available, up to two characters in

time. This mode will totally relieve the processor of this task where

certainty of transmission and reception is required. The transmitted data

is looped back by the remote station with a half-bit time delay. The local

transmitted data is internally sent to the local receiver for comparison. An

interrupt is generated in the case of an error (data mismatch, parity or

framing).

00 = the checking is disabled

01 = return data is clocked in on rise of TxC

10 = return data is clocked on of rise of TxCN

00 = reserved

reserved

Table 8:

TRR - Test and Revision Register (address 0x67) bit description

Bit

Symbol

Description

TRR[7]

Test 2 enable

Bypass divide-by-16 counter in all TxC and RxC.

6:0

TRR[6:0]

Chip Revision code

Indicates the revision of the chip. Initial code will be ‘000 0000’. The

revision code bits [6:0] are hard-wired. The default setting of the test bits

is all zeros.

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