SC28L201 datasheet(79/110 Pages) NXP

79 / 110 page

9397 750 13138

Product data sheet

Rev. 01 — 31 October 2005

79 of 110

Philips Semiconductors

SC28L201

3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

8.6.8 Input Change Detect Enable, B (IPCE)

IPCE[7:0] bits activate the input change of state detectors. If a pin is conﬁgured as an

output, the change of state detectors, if enabled, continue to be active and will show a

change of state as the I/P port changes.

8.6.9 I/O Port Conﬁguration Registers (I/OPCR0, I/OPCR1, I/OPCR2, I/OPCR3)

These four registers contain 4 2-bit ﬁelds that set the direction and source for each of the

I/O pins associated with the channel. The I/O0B output may be RTSN if MR1[7] is set. It

may also signal end of transmission if MR2[5] is set. (Please see the descriptions of these

functions under Section 8.2.2 “Mode Register 1 (MR1)” and Section 8.2.3 “Mode Register

2 (MR2)”).

The binary settings of the binary 00 combination always conﬁgures the I/O pins as

‘inputs’. However, the input circuit of the I/O pins are always active. In actuality, the binary

00 condition only disables the output driver of the pin. Since the input circuit and the

associated change-of-state detector is always active, the output signal may generate

interrupts or drive counters.

This register resets to 0x00 on reset, effectively conﬁguring all I/O pins as inputs. Inputs

may be used as RxC, TxC inputs or CTSN and General Purpose Inputs simultaneously.

All inputs are equipped with change detectors that may be used to generate interrupts or

can be polled, as required.

Remark: Both I/O Port A and B default to input upon a hardware reset to avoid hardware

conﬂicts with I/O direction.

Table 68:

IPCE - Input Change Detect Enable register, A (address 0x32) bit description

Bit

Symbol

Description

reserved

∆I/O6B enable.

0 = disable

1 = enable

reserved

∆I/O4B enable.

0 = disable

1 = enable

∆I/O3B enable.

0 = disable

1 = enable

∆I/O2B enable.

0 = disable

1 = enable

reserved

∆I/O0B enable.

0 = disable

1 = enable

SC28L201 数据表(PDF) 79 Page - NXP Semiconductors

SC28L201 数据表(HTML) 79 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

SC28L201 数据表(PDF) 79 Page - NXP Semiconductors

SC28L201 数据表(HTML) 79 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载