 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
MPC5674F 数据表(PDF) 39 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC5674F 数据表(HTML) 39 Page - Freescale Semiconductor, Inc |
|
|
39 / 132 page  Electrical Characteristics MPC5674F Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor 39 4.9 eQADC Electrical Characteristics Table 20. eQADC Conversion Specifications (Operating) Spec Characteristic Symbol Min Max Unit 1 ADC Clock (ADCLK) Frequency fADCLK 216 MHz 2 Conversion Cycles Single Ended Conversion Cycles 12 bit resolution Single Ended Conversion Cycles 10 bit resolution Single Ended Conversion Cycles 8 bit resolution Note: Differential conversion (min) is one clock cycle less than the single-ended conversion values listed here. CC 2+ 14 2+ 12 2+ 10 128 + 14 128 + 12 128 + 10 ADCLK cycles 3 Stop Mode Recovery Time1 1 Stop mode recovery time is the time from the setting of either of the enable bits in the ADC Control Register to the time that the ADC is ready to perform conversions.Delay from power up to full accuracy = 8 ms. TSR 10 — μs 4 Resolution2 2 At V RH –VRL = 5.12 V, one count = 1.25 mV without using pregain. —1.25 — mV 5 INL: 8 MHz ADC Clock3 3 INL and DNL are tested from V RL + 50 LSB to VRH – 50 LSB. The eQADC is guaranteed to be monotonic at 10 bit accuracy (12 bit resolution selected). INL8 –44 4 New design target. Actual specification will change following characterization. Margin for manufacturing has not been fully included. 44 LSB5 5 At V RH –VRL = 5.12 V, one LSB = 1.25 mV. 6 INL: 16 MHz ADC Clock3 INL16 –84 84 LSB 7 DNL: 8 MHz ADC Clock3 DNL8 –34 34 LSB 8 DNL: 16 MHz ADC Clock3 DNL16 –34 34 LSB 9 Offset Error without Calibration OFFNC 04 1004 LSB 10 Offset Error with Calibration OFFWC –44 44 LSB 11 Full Scale Gain Error without Calibration GAINNC –1204 04 LSB 12 Full Scale Gain Error with Calibration GAINWC –44,6 6 The value is valid at 8 MHz, it is ±8 counts at 16 Mhz. 44,6 LSB 13 Non-Disruptive Input Injection Current 7, 8, 9, 10 7 Below disruptive current conditions, the channel being stressed has conversion values of $3FF for analog inputs greater than VRH and $000 for values less than VRL. Other channels are not affected by non-disruptive conditions. 8 Exceeding limit may cause conversion error on stressed channels and on unstressed channels. Transitions within the limit do not affect device reliability or cause permanent damage. IINJ –3 3 m Α 14 Incremental Error due to injection current11, 12 EINJ —+44 Counts 15 TUE value at 8 MHz 13, 14 (with calibration) TUE8 — +44,6 Counts 16 TUE value at 16 MHz 13, 14 (with calibration) TUE16 — +8 Counts |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
