MPC5602D Microcontroller Product Brief, Rev. 3.1

Preliminary—Subject to Change Without Notice

Introduction

Freescale Semiconductor

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1

Introduction

The device core capitalizes on the available development infrastructure of current Power Architecture

devices and is supported with software drivers, operating systems and configuration code to assist with

users’ implementations. Refer to Section 5, “Developer environment for more information.

Table 2 provides specific memory and feature sets of the roadmap product members.

The advanced and cost-efficient host processor core of this automotive controller family complies with the

processing optimized for low power consumption.

The device platform has a single level of memory hierarchy and can support a wide range of on-chip static

random access memory (SRAM) and internal flash memory.

1.1

MPC5602D features

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Single issue, 32-bit CPU core complex (e200z0h)

— Includes an instruction set enhancement allowing variable length encoding (VLE) for code size

footprint reduction. With the optional encoding of mixed 16-bit and 32-bit instructions, it is

possible to achieve significant code size footprint reduction.

•

Up to 256 KB on-chip Code Flash supported with Flash controller and ECC

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64 KB on-chip Data Flash with ECC

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Up to 16 KB on-chip SRAM with ECC

•

Interrupt controller (INTC) with multiple interrupt vectors, including 20 external interrupt sources

and 18 external interrupt/wakeup sources

•

Frequency modulated phase-locked loop (FMPLL)

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Crossbar switch architecture for concurrent access to peripherals, Flash, or SRAM from multiple

bus masters

•

Boot assist module (BAM) supports internal Flash programming via a serial link (CAN or SCI)

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Timer supports input/output channels providing a range of 16-bit input capture, output compare,

and pulse width modulation functions (eMIOS-lite)

•

Up to 33 channel 12-bit analog-to-digital converter (ADC)

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2 serial peripheral interface (DSPI) modules

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3 serial communication interface (LINFlex) modules

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1 enhanced full CAN (FlexCAN) module with configurable buffers

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Up to 79 configurable general purpose pins supporting input and output operations (package

dependent)

•

Real Time Counter (RTC) with clock source from 128 kHz or 16 MHz internal RC oscillator

supporting autonomous wakeup with 1 ms resolution with max timeout of 2 seconds

•

Up to 4 periodic interrupt timers (PIT) with 32-bit counter resolution

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1 System Module Timer (STM)