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70592C 数据表(PDF) 127 Page - Microchip Technology |
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70592C 数据表(HTML) 127 Page - Microchip Technology |
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127 / 314 page ![]() © 2011 Microchip Technology Inc. DS70592C-page 127 PIC24HJXXXGPX06A/X08A/X10A 9.0 OSCILLATOR CONFIGURATION The PIC24HJXXXGPX06A/X08A/X10A oscillator system provides: • Various external and internal oscillator options as clock sources • An on-chip PLL to scale the internal operating frequency to the required system clock frequency • The internal FRC oscillator can also be used with the PLL, thereby allowing full-speed operation without any external clock generation hardware • Clock switching between various clock sources • Programmable clock postscaler for system power savings • A Fail-Safe Clock Monitor (FSCM) that detects clock failure and takes fail-safe measures • An Oscillator Control register (OSCCON) • Nonvolatile Configuration bits for main oscillator selection. A simplified diagram of the oscillator system is shown in Figure 9-1. FIGURE 9-1: PIC24HJXXXGPX06A/X08A/X10A OSCILLATOR SYSTEM DIAGRAM Note 1: This data sheet summarizes the features of the PIC24HJXXXGPX06A/X08A/X10A family of devices. However, it is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to Section 7. “Oscillator” (DS70227) of the “dsPIC33F/dsPIC33F/PIC24H Family Reference Manual”, which is available from the Microchip website (www.microchip.com). 2: Some registers and associated bits described in this section may not be available on all devices. Refer to Section 4.0 “Memory Organization” in this data sheet for device-specific register and bit information. Secondary Oscillator LPOSCEN SOSCO SOSCI Timer 1 XTPLL, HSPLL, XT, HS, EC FRCDIV<2:0> WDT, PWRT, FSCM FRCDIVN SOSC FRCDIV16 ECPLL, FRCPLL NOSC<2:0> FNOSC<2:0> Reset FRC Oscillator LPRC Oscillator DOZE<2:0> S3 S1 S2 S1/S3 S7 S6 FRC LPRC S0 S5 S4 ÷16 Clock Switch S7 Clock Fail ÷ 2 TUN<5:0> PLL(1) FCY FOSC Note 1: See Figure 9-2 for PLL details. 2: If the Oscillator is used with XT or HS modes, an extended parallel resistor with the value of 1 M Ω must be connected. 3: The term, FP refers to the clock source for all the peripherals, while FCY refers to the clock source for the CPU. Through- out this document FP and FCY are used interchangeably, except in the case of Doze mode. FP and FCY will be different when Doze mode is used in any ratio other than 1:1, which is the default. OSC2 OSC1 Primary Oscillator R(2) POSCMD<1:0> FP(3) |
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