LTC4365

10

4365f

Figure 4 shows the timing associated with the UV pin.

Once a UV fault propagates through the UV comparator

APPLICATIONS INFORMATION

Figure 5 shows the timing associated with the OV pin.

Once an OV fault propagates through the OV comparator

Procedure for Selecting UV/OV External Resistor Values

The following 3-step procedure helps select the resistor

values for the resistive divider of Figure 3. This procedure

minimizes UV and OV offset errors caused by leakage

currents at the respective pins.

1. Choose maximum tolerable offset at the UV pin,

presence of R3, the actual offset at UV will be slightly

lower:

R1

+R2=

V

OS(UV)

I

UV

the value of R3:

R3 = 2•

V

OS(UV)

I

UV

•UV

()

the values of R1 and R2:

R1=

+R3

R2

=

V

OS(UV)

I

UV

–R1

The example of Figure 3 uses standard 1% resistor values.

The following parameters were selected:

4365 F04

FAULT

GATE

EXTERNAL N-CHANNEL MOSFET

TURNS OFF

UV

4365 F05

FAULT

GATE

EXTERNAL N-CHANNEL MOSFET

TURNS OFF

OV

When both the UV and OV faults are removed, the external

MOSFET is not immediately turned on. The input supply

must remain within the user selected power good window

connected to the supply. This recovery timeout period

filters noise (including line noise) at the input supply and

prevents chattering of power at the load.