Analog Integrated Circuit Device Data

2

Freescale Semiconductor

33882

INTERNAL BLOCK DIAGRAM

INTERNAL BLOCK DIAGRAM

30 (OUT6)

26 (OUT5)

23 (OUT4)

20 (OUT3)

10 (OUT2)

7 (OUT1)

5 (OUT0)

16 (VDD)

1 (VPWR)

12 (SI)

3 (MODE)

18 (IN7)

29 (IN6)

24 (IN4)

28 (IN4 & IN5)

21 (IN3)

27 (IN5)

9 (IN2)

19 (IN2 & IN3)

6 (IN1)

4 (IN0)

2 (IN0 & IN1)

13 (SCLK)

14 (CS)

15 (SO)

Serial Out

Serial In

DDD

DD

D

D

D

CCC

CC

C

C

C

Q

QQQQ

Q

Q

Q

DD

V

DD

V

Tri-state

Shift

Enable

SO Fault Latch/Shift Register

Output 0 Status

Output Status

1 through 7

Gate 0

Gate 0

Gate 2

Gate 3

Gate 4

Gate 5

Gate 6

Gate 7

Over-voltage

Shutdown

Under-voltage

Shutdown

Internal

Bias

Detect

Logic

On Open

Open

Load

OFF/ON

Detect

Load

Short

3.0 A

Detect

REF

V

LIM

I

OF (th)

V

O(OFF)

I

40

μA

3.0 V

52 V

OUT6

and OUT7

Unclamped

Low

Power

OUT1

to OUT5

Power

01

2

3

45

6

7

GND (Heat Sink)

Note Pin numbers shown in this figure are applicable only to the 30-lead HSOP package.

High

Figure 2. 33882 Simplified Internal Block Diagram