CY2DP1502

Document Number: 001-56308 Rev. *G

Page 7 of 13

Figure 6. Output-to-Output and Device-to-Device Skew

Figure 7. RMS Phase Jitter

Figure 8. Output Rise/Fall Time

Device 1

Device 2

Phase noise

Phase noise mark

Offset Frequency

f1

f2

Area Under the Masked Phase Noise Plot

Noise Power

20%

80%

20%

80%