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PCF8564A 数据表(PDF) 9 Page - NXP Semiconductors

部件名 PCF8564A
功能描述  Real time clock and calendar
PDF  45 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8564A 数据表(HTML) 9 Page - NXP Semiconductors

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PCF8564A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 30 September 2010
9 of 45
NXP Semiconductors
PCF8564A
Real time clock and calendar
8.4 Time and date registers
The majority of the registers are coded in the BCD format to simplify application use.
8.4.1 Register Seconds
[1]
Start-up value.
8.4.1.1
Voltage low detector and clock monitor
The PCF8564A has an on-chip voltage low detector. When VDD drops below Vlow the VL
(Voltage Low) flag is set to indicate that the integrity of the clock information is no longer
guaranteed. The VL flag can only be cleared by using the interface.
Table 8.
Seconds - seconds and clock integrity status register (address 02h) bit
description
Bit
Symbol
Value
Place value Description
7
VL
0
-
clock integrity is guaranteed
1[1]
-
integrity of the clock information is not guaranteed
6 to 4 SECONDS 0 to 5
ten’s place
actual seconds coded in BCD format, see Table 9
3 to 0
0 to 9
unit place
Table 9.
Seconds coded in BCD format
Seconds value in
decimal
Upper-digit (ten’s place)
Digit (unit place)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
00
000
0000
01
000
0001
02
000
0010
:
09
000
1001
10
001
0000
:
58
101
1000
59
101
1001
Fig 5.
Voltage low detection
VL set
normal power
operation
period of battery
operation
t
VDD
Vlow
mgr887



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