PCF85162 datasheet(21/46 Pages) NXP

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PCF85162

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Product data sheet

Rev. 3 — 16 June 2011

21 of 46

NXP Semiconductors

PCF85162

Universal LCD driver for low multiplex rates

[1]

The blink frequency is proportional to the clock frequency (fclk). For the range of the clock frequency see

Table 19.

The entire display can blink at a frequency other than the nominal blink frequency. This

can be effectively performed by resetting and setting the display enable bit E at the

required rate using the mode-set command (see Table 11).

7.12 Command decoder

The command decoder identifies command bytes that arrive on the I2C-bus. The

commands available to the PCF85162 are defined in Table 9.

All available commands carry a continuation bit C in their most significant bit position as

shown in Figure 18. When this bit is set, it indicates that the next byte of the transfer to

arrive will also represent a command. If this bit is reset, it indicates that the command byte

is the last in the transfer. Further bytes will be regarded as display data (see Table 10).

Table 8.

Blink frequencies[1]

Blink mode

Blink frequency equation

off

blink

clk

768

----------

blink

clk

1536

-------------

blink

clk

3072

-------------

Table 9.

Definition of PCF85162 commands

Bit position labeled as - is not used.

Command

Operation code

Reference

Bit

mode-set

M[1:0]

Table 11

load-data-pointer

P[4:0]

Table 12

device-select

110

0A[2:0]

Table 13

bank-select

Table 14

blink-select

BF[1:0]

Table 15

Table 10.

C bit description

Bit

Symbol

Value

Description

continue bit

last control byte in the transfer; next byte will be regarded

as display data

control bytes continue; next byte will be a command too

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