SC1205

HIGH SPEED SYNCHRONOUS POWER

MOSFET DRIVER

© 1999 SEMTECH CORP.

652 MITCHELL ROAD NEWBURY PARK CA 91320

PRELIMINARY - December 7, 1999

5

NOTE:

(1) All logic level inputs and outputs are open collector TTL compatible.

PIN DESCRIPTION

Pin #

Pin Name

Pin Function

1

DRN

This pin connects to the junction of the switching and synchronous

MOSFET’s. This pin can be subjected to a -2V minimum relative to

PGND without affecting operation.

2

TG

Output gate drive for the switching (high-side) MOSFET.

3

BST

Bootstrap pin. A capacitor is connected between BST and DRN pins to

develop the floating bootstrap voltage for the high-side MOSFET. The

capacitor value is typically between 0.1µF and 1µF (ceramic).

4

CO

TTL-level input signal to the MOSFET drivers.

5

EN

When high, this pin enables the internal circuitry of the device. When

low, TG, BG and PRDY are forced low and the supply current (5V) is

less than 10µA.

6

VS

+5V supply. A .22-1µF ceramic capacitor should be connected from 5V

to PGND very close to this pin.

7

BG

Output drive for the synchronous MOSFET.

8

PGND

Ground.

TIMING DIAGRAM