DS80C310

6 of 22

machine cycle takes 4 clocks. Thus the fastest instruction, 1 machine cycle, executes three times faster for

the same crystal frequency. Note that these are identical instructions. The majority of instructions on the

DS80C310 will see the full 3-to-1 speed improvement. Some instructions will get between 1.5 and 2.4 to

1 improvement. All instructions are faster than the original 8051.

The numerical average of all op codes gives approximately a 2.5-to-1 speed improvement. Improvement

of individual programs depends on the actual instructions used. Speed-sensitive applications would make

the most use of instructions that are three times faster. However, the sheer number of 3-to-1 improved

op codes makes dramatic speed improvements likely for any code. These architecture improvements and

0.8

m CMOS produce a peak instruction cycle in 160ns (6.25MIPS). The dual data pointer feature also

allows the user to eliminate wasted instructions when moving blocks of memory.

INSTRUCTION SET SUMMARY

All instructions in the DS80C310 perform the same functions as their 8051 counterparts. Their effect on

bits, flags, and other status functions is identical. However, the timing of each instruction is different.

This applies both in absolute and relative number of clocks.

For absolute timing of real-time events, the timing of software loops can be calculated using a table in the

High-Speed Microcontroller User’s Guide. However, counter/timers default to run at the older 12 clocks

per increment. In this way, timer-based events occur at the standard intervals with software executing at

higher speed. Timers optionally can run at 4 clocks per increment to take advantage of faster processor

operation.

The relative time of two instructions might be different in the new architecture than it was previously. For

example, in the original architecture the “MOVX A, @ DPTR” instruction and the “MOV direct, direct”

instruction used 2 machine cycles or 24 oscillator cycles. Therefore, they required the same amount of

time. In the DS80C310, the MOVX instruction takes as little as 2 machine cycles or 8 oscillator cycles

but the “MOV direct, direct” uses 3 machine cycles or 12 oscillator cycles. While both are faster than

their original counterparts, they now have different execution times. This is because the DS80C310

usually uses 1 instruction cycle for each instruction byte. The user concerned with precise program timing

should examine the timing of each instruction for familiarity with the changes. Note that a machine cycle

now requires just 4 clocks, and provides one ALE pulse per cycle. Many instructions require only 1 cycle,

but some require 5. In the original architecture, all were 1 or 2 cycles except for MUL and DIV. Refer to

the High-Speed Microcontroller User’s Guide for details and individual instruction timing.