Eight Output Differential Buffer for PCIe Gen 2

ICS9DB803DI

REV A

06/18/08

ICS9DB803DI

Eight Output Differential Buffer for PCIe for Gen 2

7

Absolute Max

Electrical Characteristics - Input/Supply/Common Output Parameters

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS NOTES

Input High Voltage

3.3 V +/-5%

2

V

Input Low Voltage

3.3 V +/-5%

GND - 0.3

0.8

V

Input High Current

-5

5

uA

-5

uA

-200

uA

Operating Supply Current

200

mA

all diff pairs driven

60

mA

all differential pairs tri-stated

6

mA

PLL Mode

50

110

MHz

1

Bypass Mode

50

400

MHz

1

Pin Inductance

7nH

1

Logic Inputs

1.5

5

pF

1

Output pin capacitance

6

pF

1

PLL Bandwidth when PLL_BW=0

2

3

4

MHz

1

PLL Bandwidth when PLL_BW=1

0.7

1

1.4

MHz

1

Clk Stabilization

stabilization or de-assertion of PD# to 1st

clock

1ms

1,2

Modulation Frequency

Triangular Modulation

30

33

kHz

1

Tdrive_SRC_STOP#

DIF output enable after

SRC_Stop# de-assertion

10

ns

1,3

Tdrive_PD#

DIF output enable after

PD# de-assertion

300

us

1,3

Tfall

Fall time of PD# and SRC_STOP#

5

ns

1

Trise

Rise time of PD# and SRC_STOP#

5

ns

2

Capacitance

Input Low Current

Powerdown Current

PLL Bandwidth

BW

Input Frequency

Symbol

Parameter

Min

Max

Units

VDD_A

3.3V Core Supply Voltage

4.6

V

VDD_In

3.3V Logic Supply Voltage

4.6

V

Input Low Voltage

GND-0.5

V

Input High Voltage

V

Ts

Storage Temperature

-65

150

Tambient

Ambient Operating Temp

-40

85

°C

Tcase

Case Temperature

115

°C

ESD prot

Input ESD protection

human body model

2000

V