ICS9DB803DFILFT datasheet(1/21 Pages) IDT

部件名	ICS9DB803DFILFT

功能描述	Eight Output Differential Buffer for PCIe Gen 2

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制造商	IDT [Integrated Device Technology]

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ICS9DB803DI

IDTTM/ICSTM

Eight Output Differential Buffer for PCIe Gen 2

ICS9DB803DI

REV A

06/18/08

Eight Output Differential Buffer for PCIe Gen 2

DATASHEET

1

STOP

LOGIC

SRC_IN

SRC_IN#

DIF(7:0))

CONTROL

LOGIC

BYPASS#/PLL

SDATA

SCLK

PD#

SPREAD

COMPATIBLE

PLL

8

IREF

OE_(7:0)

8

LOCK

SRC_STOP#

HIGH_BW#

M

U

X

Description

Output Features

The 9DB803 is a DB800 Version 2.0 Yellow Cover part with PCI

Express Gen II support. It can be used in PC or embedded

systems to provide outputs that have low cycle-to-cycle jitter

(50ps), low output-to-output skew (100ps), and are PCI Express

Gen 2 compliant. The 9DB803 supports a 1 to 8 output

configuration, taking a spread or non spread differential HCSL

input from a CK410(B) main clock such as 954101 and

932S401, or any other differential HCSL pair. 9DB803 can

generate HCSL or LVDS outputs from 50 to 100MHz in PLL

mode or 50 to 400Mhz in bypass mode. There are two de-

jittering modes available selectable through the HIGH_BW#

input pin, high bandwidth mode provides de-jittering for spread

inputs and low bandwidth mode provides extra de-jittering for

non-spread inputs. The SRC_IN#, PD#, and individual OE real-

time input pins provide completely programmable power

management control.

•

8 - 0.7V current-mode differential output pairs

•

Supports zero delay buffer mode and fanout mode

•

Bandwidth programming available

Funtional Block Diagram

Key Specifications

•

Outputs cycle-cycle jitter < 50ps

•

Outputs skew: 50ps

•

50-100 MHz operation in PLL mode

•

50-400 MHz operation in Bypass mode

•

Phase jitter: PCIe Gen1 < 86ps peak to peak

•

Phase jitter: PCIe Gen2 < 3.1ps rms

•

48-pin SSOP/TSSOP package

•

Available in RoHS compliant packaging

Features/Benefits

•

Spread spectrum modulation tolerant, 0 to -0.5% down

spread and +/- 0.25% center spread.

•

Supports undriven differential outputs in PD# and

SRC_STOP# modes for power management.

Note: Polarities shown for OE_INV = 0.

类似零件编号 - ICS9DB803DFILFT

制造商	部件名	数据表	功能描述
Renesas Technology Corp	ICS9DB803D	458Kb / 23P	EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1 AND GEN2 2019

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类似说明 - ICS9DB803DFILFT

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Integrated Device Techn...	9DB106	193Kb / 14P	Six Output Differential Buffer for PCIe Gen 2
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	ICS9DB803D	458Kb / 23P	EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1 AND GEN2 2019
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