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SSG4512CE 数据表(PDF) 3 Page - SeCoS Halbleitertechnologie GmbH |
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SSG4512CE 数据表(HTML) 3 Page - SeCoS Halbleitertechnologie GmbH |
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3 / 7 page ![]() SSG4512CE N & P-Ch Enhancement Mode Power MOSFET N-Ch: 6.9 A, 30 V, RDS(ON) 31 mΩ Ω Ω Ω P-Ch: -5.2 A, -30 V, RDS(ON) 52 mΩ Ω Ω Ω Elektronische Bauelemente 26-Dec-2011 Rev. A Page 3 of 7 http://www.SeCoSGmbH.com/ Any changes of specification will not be informed individually. P-CHANNEL ELECTRICAL CHARACTERISTICS (TA=25°C unless otherwise specified) Parameter Symbol Min. Typ. Max. Unit Test Conditions Static Gate Threshold Voltage VGS(th) -1 - - V VDS=VGS, ID= -250µA Gate-Source Leakage Current IGSS - - ±100 nA VGS= -8V, VDS=0 Drain-Source Leakage Current IDSS - - -1 µA VDS= -24V, VGS=0 On-State Drain Current 1 ID(ON) -20 - - A VDS= -5V, VGS= -10V Static Drain-Source On-Resistance 1 RDS(ON) - - 52 m VGS= -10V, ID= -5.2A - - 80 VGS= -4.5V, ID= -4.2A Forward Transconductance 1 gfs - 10 - S VDS= -15V, ID= -5.2A Dynamic Total Gate Charge Qg - 10 nC ID= -5.2A VDS= -15V VGS= -10V Gate-Source Charge Qgs - 2.2 - Gate-Drain (“Miller”) Change Qgd - 1.7 - Turn-on Delay Time Td(on) - 10 - nS VDD= -15V VGS= -10V ID= -1A RGEN=6 Rise Time Tr - 2.8 - Turn-off Delay Time Td(off) - 53.6 - Fall Time Tf - 46 - Notes: 1. Pulse test: PW ≦ 300us duty cycle ≦ 2%. 2. Guaranteed by design, not subject to production testing. |
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