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R5F5630ECDLK 数据表(PDF) 129 Page - Renesas Technology Corp |
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R5F5630ECDLK 数据表(HTML) 129 Page - Renesas Technology Corp |
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129 / 165 page  R01DS0060EJ0100 Rev.1.00 Page 129 of 168 Sep 13, 2011 RX630 Group 5. Electrical Characteristics Figure 5.14 Deep Software Standby Mode Cancellation Timing 5.4.3 Control Signal Timing Figure 5.15 NMI Interrupt Input Timing Figure 5.16 IRQ Interrupt Input Timing Table 5.13 Control Signal Timing Conditions: VCC = AVCC0 = VCC_USB = VBATT = 2.7 to 3.6 V, VREFH/VREFH0 = 2.7 V to AVCC0, VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V, Ta = Topr Item Symbol Min. Typ. Max. Unit Test Conditions NMI pulse width tNMIW 200 ——ns tc (PCLK) × 2 ≤ 200 ns Figure 5.15 tc (PCLK) × 2 tc (PCLK) × 2 > 200 ns Figure 5.15 IRQ pulse width tIRQW 200 ——ns tc (PCLK) × 2 ≤ 200 ns Figure 5.16 tc (PCLK) × 2 tc (PCLK) × 2 > 200 ns Figure 5.16 Oscillator IRQ Internal reset Reset exception handling start Deep software standby mode Deep software standby reset tDSBY tDSBYWT NMI tNMIW IRQ tIRQW |
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