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MICRF219 数据表(PDF) 17 Page - Micrel Semiconductor

部件名 MICRF219
功能描述  300MHz to 450MHz ASK Receiver with RSSI, Auto-Poll, Bit-Che
PDF  23 Pages
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制造商  MICREL [Micrel Semiconductor]
网页  http://www.micrel.com
标志 MICREL - Micrel Semiconductor

MICRF219 数据表(HTML) 17 Page - Micrel Semiconductor

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Micrel
MICRF219
June 2011
17
M9999-060811
(408) 944-0800
ey are the
pin has a
enough for
today. The
RF signal
determine
signal-to-noise ratio of the RF link, crude range
capacitor
ve energy.
e de c
ion is
en toggling
ired f
a tim
o show up in the DO pin. This time w
dependent upon many things such as tempe
the crystal used, and if there is an external os
with faster startup time. See Figure 11 and Figu
or time-to-good-data on both 433.92MHz and 31
versions.
Three other pins are worthy of comment. Th
DO, RSSI, and shutdown pins. The DO
driving capability of 0.4mA. This is good
most of the logic family ICs on the market
RSSI pin provides a transfer function of the
intensity versus voltage. It is very useful to
the
estimate from the transmitter source and AM
demodulation, which requires a low CAGC
value.
The shutdown pin (SHDN) is useful to sa
Making its level close to VDD (SHDN = 1), th
not in operation. Its DC current consumpt
than 1µA (do not forget to remove R3). Wh
from high to low, there will be a time requ
device to come to steady-state mode, and
data t
vi e is
less
or the
e for
ill be
rature,
cillator
re 12
5MHz
Figure 12. Time-to-Good-Data a
315MHz at Room Te
Serial Register Programming
Programming the device is accompli
of pins DO and SCLK. Norm
outputting data and needs to
ma
fter Shutdown Cycle,
mperature
shed by the use
ally, D0 (Pin 10) is
switch to an input pin
de by the start sequence, as shown at Figure 13.
High at the SCLK pin tri-states the DO pin, enabling
the external drive into the DO pin with an initial low
level. The start sequence is completed by taking
SCLK low, then high while DO is low, followed by
taking DO high, then low while SCLK is high. The
serial interface is initialized and ready to receive the
programming data.
BIT TIME 1
BIT TIME 0
DO AS
OUTPUT
DO INPUT BITS:
SCLK
T1
T2
T6
T7
T3
T4
T5
T8
T9
D19
“19”
“0”
“0”
“1”
D18
D17
BIT TIME 2
Figure 11. Time-to-Good-Data after Shutdown Cycle,
433.92MHz, Room Temperature
Figure 13. Serial Interface Start Sequence



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