AD7607 datasheet(20/36 Pages) AD

20 / 36 page

AD7609

Data Sheet

Rev. A | Page 20 of 36

Power Supply Rejection (PSR)

Variations in power supply affect the full-scale transition but

not the converter’s linearity. Power supply rejection is the

maximum change in full-scale transition point due to a change

in power supply voltage from the nominal value. The power

supply rejection ratio is defined as the ratio of the power in

the ADC output at full-scale frequency, f, to the power of a

200 mV p-p sine wave applied to the ADC VDD and VSS supplies

of Frequency fS.

PSRR (dB) = 10 log (Pf/PfS)

where:

Pf is equal to the power at Frequency f in the ADC output.

PfS is equal to the power at Frequency fS coupled onto the VDD

and VSS supplies.

Channel-to-Channel Isolation

Channel-to-channel isolation is a measure of the level of crosstalk

between any two channels. It is measured by applying a full-scale,

10 kHz sine wave signal to all unselected input channels and

determining the degree to which the signal attenuates in the

selected channel with a 1 kHz signal.

Common-Mode Rejection Ratio (CMRR)

CMRR is defined as the ratio of the power in the ADC

common-mode input at full-scale frequency, f, to the power in

the output of a full-scale p-p sine wave applied to the common-

mode voltage of VINX+ and VINX− of frequency, fS,

CMRR (dB) = 20 log (Pf/PfS)

where:

Pf is equal to the power at Frequency f in the ADC input.

PfS is equal to the power at Frequency fS in the ADC output.

AD7607 数据表(PDF) 20 Page - Analog Devices