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AD7609

Data Sheet

Rev. A | Page 22 of 36

Analog Input Antialiasing Filter

An analog antialiasing filter is also provided on the AD7609.

The filter is a second-order Butterworth. Figure 35 and

Figure 36 show the frequency and phase response respectively

of the analog antialiasing filter. In the ±5 V range, the −3 dB

frequency is typically 23 kHz. In the ±10 V range, the −3 dB

frequency is typically 32 kHz.

–40

–35

–30

–25

–20

–15

–10

–5

100

10k

100k

FREQUENCY (Hz)

10V DIFF

5V DIFF

10V

0.1dB

TEMP

3dB

–40°C 13,354Hz

33,520Hz

25°C 12,769Hz

32,397Hz

85°C 12,427Hz

31,177Hz

–40°C 10,303Hz

24,365Hz

25°C

9619Hz

23,389Hz

85°C

9326Hz

22,607Hz

Figure 35. Analog Antialiasing Filter Frequency Response

100k

10k

INPUT FREQUENCY (Hz)

±5V RANGE

±10V RANGE

AVCC, VDRIVE = 5V

fSAMPLE = 200kSPS

TA = 25°C

Figure 36. Analog Antialiasing Filter Phase Response

Track-and-Hold Amplifiers

The track-and-hold amplifiers on the AD7609 allow the ADC to

accurately acquire an input sine wave of full-scale amplitude

to 18-bit resolution. The track-and-hold amplifiers sample

their respective inputs simultaneously on the rising edge of

CONVST x. The aperture time for track-and-hold (that is, the

delay time between the external CONVST x signal and the

track-and-hold actually going into hold) is well matched, by design,

across all eight track-and-holds on one device and from device

to device. This matching allows more than one AD7609 device

to be sampled simultaneously in a system.

The end of the conversion process across all eight channels is

indicated by the falling edge of BUSY; and it is at this point that the

track-and-holds return to track mode and the acquisition time

for the next set of conversions begins.

The conversion clock for the part is internally generated, and

the conversion time for all channels is 4 µs on the AD7609. The

BUSY signal returns low after all eight conversions to indicate the

end of the conversion process. On the falling edge of BUSY, the

track-and-hold amplifiers return to track mode. New data can

be read from the output register via the parallel, or serial

interface after BUSY goes low; or, alternatively, data from the

previous conversion can be read while BUSY is high. Reading data

from the AD7609 while a conversion is in progress has little

effect on performance and allows a faster throughput to be

achieved. With a VDRIVE > 3.3 V, the SNR is reduced by ~1.5 dB

when reading during a conversion.

ADC TRANSFER FUNCTION

The output coding of the AD7609 is twos complement. The

designed code transitions occur midway between successive

integer LSB values, that is, 1/2 LSB, 3/2 LSB. The LSB size is

FSR/262,144 for the AD7609. The FSR for the AD7609 is 40 V

for the ±10 V range and 20 V for the ±5 V range. The ideal

transfer characteristic for the AD7609 is shown in Figure 37.

011...111

011...110

000...001

000...000

111...111

100...010

100...001

100...000

–FS + 1/2LSB

0V – 1LSB

+FS – 3/2LSB

ANALOG INPUT

+FSR – (–FSR)

218

LSB =

V+ ± (V–)

REF

2.5V

±5V CODE =

× 131,072 ×

V+ ± (V–)

10V

REF

2.5V

±10V CODE =

× 131,072 ×

Figure 37. AD7609 Transfer Characteristic

The LSB size is dependent on the analog input range selected

(see Table 7).

Table 7. Output Codes and Ideal Input Values

Description

Analog Input

(V+ − (V−)

10 V Range

Analog

Input

V+ − (V−)

5 V Range

Digital

Output

Code (Hex)

FSR − 0.5 LSB

+19.99992 V

9.999961 V

0x1FFFF

Midscale + 1 LSB

+152.58 µV

76 µV

0x00001

Midscale

0 V

0x00000

Midscale – 1 LSB

−152.58 µV

−76 µV

0x3FFFF

−FSR + 1 LSB

−19.99984 V

−9.99992 V

0x20001

−FSR

−20 V

−10 V

0x20000

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