ADL5363ACPZ-R7 datasheet(19/24 Pages) AD

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ADL5363

Rev. 0 | Page 19 of 24

APPLICATIONS INFORMATION

BASIC CONNECTIONS

The ADL5363 mixer is designed to downconvert radio frequen-

cies (RF) primarily between 2300 MHz and 2900 MHz to lower

intermediate frequencies (IF) between 30 MHz and 450 MHz.

Figure 49 depicts the basic connections of the mixer. To prevent

nonzero dc voltages from damaging the RF balun or LO input

circuit, ac-couple the RF and LO input ports. The RFIN

matching network consists of a series 1.5 pF capacitor and a

shunt 12 nH inductor to provide the optimized RF input return

loss for the desired frequency band.

IF PORT

The real part of the output impedance is approximately 50 Ω, as

seen in Figure 26, which matches many commonly used SAW

filters without the need for a transformer. This results in a

voltage conversion loss that is approximately the same as the

power conversion loss, as shown in Table 3.

BIAS RESISTOR SELECTION

An external resistor, RBIAS LO, is used to adjust the bias current

of the integrated amplifiers at the LO terminals. It is necessary

to have a sufficient amount of current to bias the internal LO

amplifier to optimize dc current vs. optimum IIP3 performance.

Figure 37 and Figure 38 provide the reference for the bias

resistor selection when lower power consumption is considered

at the expense of conversion gain and IP3 performance.

MIXER VGS CONTROL DAC

The ADL5363 features two logic control pins, VGS0 (Pin 12) and

VGS1 (Pin 13), that allow programmability for internal gate-to-

source voltages for optimizing mixer performance over desired

frequency bands. The evaluation board defaults both VGS0 and

VGS1 to ground.

BIAS

GENERATOR

LO2_IN

RF-IN

+5V

LO1_IN

10kΩ

0Ω

C24

560pF

10kΩ

10pF

1.5pF

10pF

10µH

0.01µF

4.7µF

RBIAS LO

22pF

10pF

22pF

ADL5363

IF1_OUT

C25

560pF

12nH

Figure 49. Typical Application Circuit

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